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Searched refs:underlay_idx (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_resource.c856 static bool is_surface_pixel_format_supported(struct pipe_ctx *pipe_ctx, unsigned int underlay_idx) in is_surface_pixel_format_supported() argument
858 if (pipe_ctx->pipe_idx != underlay_idx) in is_surface_pixel_format_supported()
1055 unsigned int underlay_idx = pool->underlay_pipe_index; in dce110_acquire_underlay() local
1056 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[underlay_idx]; in dce110_acquire_underlay()
1058 if (res_ctx->pipe_ctx[underlay_idx].stream) in dce110_acquire_underlay()
1061 pipe_ctx->stream_res.tg = pool->timing_generators[underlay_idx]; in dce110_acquire_underlay()
1062 pipe_ctx->plane_res.mi = pool->mis[underlay_idx]; in dce110_acquire_underlay()
1064 pipe_ctx->plane_res.xfm = pool->transforms[underlay_idx]; in dce110_acquire_underlay()
1065 pipe_ctx->stream_res.opp = pool->opps[underlay_idx]; in dce110_acquire_underlay()
1066 pipe_ctx->pipe_idx = underlay_idx; in dce110_acquire_underlay()
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Ddce110_hw_sequencer.c201 unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; in dce110_enable_display_power_gating() local
213 if (controller_id == underlay_idx) in dce110_enable_display_power_gating()
1651 unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; in dce110_set_displaymarks() local
1669 if (i == underlay_idx) { in dce110_set_displaymarks()
1687 int underlay_idx = pool->underlay_pipe_index; in dce110_set_safe_displaymarks() local
1706 if (i == underlay_idx) in dce110_set_safe_displaymarks()
1797 unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; in should_enable_fbc() local
1819 if (pipe_ctx->pipe_idx != underlay_idx) { in should_enable_fbc()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/core/
Ddc_debug.c316 unsigned int underlay_idx = core_dc->res_pool->underlay_pipe_index; in context_timing_trace() local
325 if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx) in context_timing_trace()
335 if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx) in context_timing_trace()