Searched refs:timer_clk_rate (Results 1 – 4 of 4) sorted by relevance
61 u32 timer_clk_rate) in csiphy_settle_cnt_calc() argument78 timer_period = div_u64(1000000000000LL, timer_clk_rate); in csiphy_settle_cnt_calc()94 csiphy->timer_clk_rate); in csiphy_lanes_enable()
115 u32 timer_clk_rate) in csiphy_settle_cnt_calc() argument130 timer_period = div_u64(1000000000000LL, timer_clk_rate); in csiphy_settle_cnt_calc()146 csiphy->timer_clk_rate); in csiphy_lanes_enable()
70 u32 timer_clk_rate; member
150 csiphy->timer_clk_rate = round_rate; in csiphy_set_clock_rates()152 ret = clk_set_rate(clock->clk, csiphy->timer_clk_rate); in csiphy_set_clock_rates()
