| /Linux-v5.4/drivers/gpu/drm/i915/ |
| D | intel_device_info.c | 88 static void sseu_dump(const struct sseu_dev_info *sseu, struct drm_printer *p) in sseu_dump() argument
93 hweight8(sseu->slice_mask), sseu->slice_mask); in sseu_dump()
94 drm_printf(p, "subslice total: %u\n", intel_sseu_subslice_total(sseu)); in sseu_dump()
95 for (s = 0; s < sseu->max_slices; s++) { in sseu_dump()
97 s, intel_sseu_subslices_per_slice(sseu, s), in sseu_dump()
98 sseu->subslice_mask[s]); in sseu_dump()
100 drm_printf(p, "EU total: %u\n", sseu->eu_total); in sseu_dump()
101 drm_printf(p, "EU per subslice: %u\n", sseu->eu_per_subslice); in sseu_dump()
103 yesno(sseu->has_slice_pg)); in sseu_dump()
105 yesno(sseu->has_subslice_pg)); in sseu_dump()
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| D | i915_query.c | 37 const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu; in query_topology_info() local
40 u8 subslice_stride = GEN_SSEU_STRIDE(sseu->max_subslices); in query_topology_info()
41 u8 eu_stride = GEN_SSEU_STRIDE(sseu->max_eus_per_subslice); in query_topology_info()
47 if (sseu->max_slices == 0) in query_topology_info()
50 BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); in query_topology_info()
52 slice_length = sizeof(sseu->slice_mask); in query_topology_info()
53 subslice_length = sseu->max_slices * subslice_stride; in query_topology_info()
54 eu_length = sseu->max_slices * sseu->max_subslices * eu_stride; in query_topology_info()
67 topo.max_slices = sseu->max_slices; in query_topology_info()
68 topo.max_subslices = sseu->max_subslices; in query_topology_info()
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| D | i915_getparam.c | 13 const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu; in i915_getparam_ioctl() local
71 value = intel_sseu_subslice_total(sseu); in i915_getparam_ioctl()
76 value = sseu->eu_total; in i915_getparam_ioctl()
93 value = sseu->min_eu_in_pool; in i915_getparam_ioctl()
144 value = sseu->slice_mask; in i915_getparam_ioctl()
149 value = sseu->subslice_mask[0]; in i915_getparam_ioctl()
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| D | i915_debugfs.c | 2809 intel_device_info_dump_topology(&RUNTIME_INFO(dev_priv)->sseu, &p); in i915_rcs_topology()
3729 struct sseu_dev_info *sseu) in cherryview_sseu_device_status() argument
3748 sseu->slice_mask = BIT(0); in cherryview_sseu_device_status()
3749 sseu->subslice_mask[0] |= BIT(ss); in cherryview_sseu_device_status()
3754 sseu->eu_total += eu_cnt; in cherryview_sseu_device_status()
3755 sseu->eu_per_subslice = max_t(unsigned int, in cherryview_sseu_device_status()
3756 sseu->eu_per_subslice, eu_cnt); in cherryview_sseu_device_status()
3762 struct sseu_dev_info *sseu) in gen10_sseu_device_status() argument
3769 for (s = 0; s < info->sseu.max_slices; s++) { in gen10_sseu_device_status()
3791 for (s = 0; s < info->sseu.max_slices; s++) { in gen10_sseu_device_status()
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| D | intel_device_info.h | 210 struct sseu_dev_info sseu; member
231 void intel_device_info_dump_topology(const struct sseu_dev_info *sseu,
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| D | i915_perf.c | 1707 intel_sseu_make_rpcs(i915, &ce->sseu)); in gen8_update_reg_state_unlocked()
1820 flex->value = intel_sseu_make_rpcs(ctx->i915, &ce->sseu); in gen8_configure_context()
1935 regs[0].value = intel_sseu_make_rpcs(i915, &ce->sseu); in gen8_configure_all_contexts()
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| D | i915_gpu_error.c | 601 intel_device_info_dump_topology(&runtime->sseu, &p); in err_print_capabilities()
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| D | intel_pm.c | 7566 switch (RUNTIME_INFO(dev_priv)->sseu.eu_total) { in cherryview_rps_max_freq()
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| /Linux-v5.4/drivers/gpu/drm/i915/gt/ |
| D | intel_sseu.c | 12 intel_sseu_subslice_total(const struct sseu_dev_info *sseu) in intel_sseu_subslice_total() argument
16 for (i = 0; i < ARRAY_SIZE(sseu->subslice_mask); i++) in intel_sseu_subslice_total()
17 total += hweight8(sseu->subslice_mask[i]); in intel_sseu_subslice_total()
23 intel_sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice) in intel_sseu_subslices_per_slice() argument
25 return hweight8(sseu->subslice_mask[slice]); in intel_sseu_subslices_per_slice()
31 const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu; in intel_sseu_make_rpcs() local
32 bool subslice_pg = sseu->has_subslice_pg; in intel_sseu_make_rpcs()
55 ctx_sseu = intel_sseu_from_device_info(sseu); in intel_sseu_make_rpcs()
99 subslices > min_t(u8, 4, hweight8(sseu->subslice_mask[0]) / 2)) { in intel_sseu_make_rpcs()
112 if (sseu->has_slice_pg) { in intel_sseu_make_rpcs()
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| D | intel_sseu.h | 54 intel_sseu_from_device_info(const struct sseu_dev_info *sseu) in intel_sseu_from_device_info() argument
57 .slice_mask = sseu->slice_mask, in intel_sseu_from_device_info()
58 .subslice_mask = sseu->subslice_mask[0], in intel_sseu_from_device_info()
59 .min_eus_per_subslice = sseu->max_eus_per_subslice, in intel_sseu_from_device_info()
60 .max_eus_per_subslice = sseu->max_eus_per_subslice, in intel_sseu_from_device_info()
67 intel_sseu_subslice_total(const struct sseu_dev_info *sseu);
70 intel_sseu_subslices_per_slice(const struct sseu_dev_info *sseu, u8 slice);
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| D | intel_engine_types.h | 313 struct intel_sseu sseu; member
588 1 : RUNTIME_INFO(dev_priv__)->sseu.slice_mask)
592 1 : RUNTIME_INFO(dev_priv__)->sseu.subslice_mask[0])
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| D | intel_workarounds.c | 384 if (!is_power_of_2(RUNTIME_INFO(i915)->sseu.subslice_7eu[i])) in skl_tune_iz_hashing()
393 ss = ffs(RUNTIME_INFO(i915)->sseu.subslice_7eu[i]) - 1; in skl_tune_iz_hashing()
753 const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu; in wa_init_mcr() local
787 if (INTEL_GEN(i915) >= 10 && is_power_of_2(sseu->slice_mask)) { in wa_init_mcr()
798 slice = fls(sseu->slice_mask) - 1; in wa_init_mcr()
799 GEM_BUG_ON(slice >= ARRAY_SIZE(sseu->subslice_mask)); in wa_init_mcr()
800 subslice = fls(l3_en & sseu->subslice_mask[slice]); in wa_init_mcr()
803 sseu->subslice_mask[slice], l3_en); in wa_init_mcr()
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| D | intel_context_types.h | 76 struct intel_sseu sseu; member
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| D | intel_context.c | 233 ce->sseu = engine->sseu; in intel_context_init()
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| D | intel_engine_cs.c | 607 engine->sseu = in intel_engine_setup_common()
608 intel_sseu_from_device_info(&RUNTIME_INFO(engine->i915)->sseu); in intel_engine_setup_common()
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| D | intel_lrc.c | 1777 intel_sseu_make_rpcs(engine->i915, &ce->sseu); in __execlists_update_reg_state()
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| /Linux-v5.4/drivers/gpu/drm/i915/gem/ |
| D | i915_gem_context.c | 1109 struct intel_sseu sseu) in gen8_emit_rpcs_config() argument
1125 *cs++ = intel_sseu_make_rpcs(rq->i915, &sseu); in gen8_emit_rpcs_config()
1133 gen8_modify_rpcs(struct intel_context *ce, struct intel_sseu sseu) in gen8_modify_rpcs() argument
1156 ret = gen8_emit_rpcs_config(rq, ce, sseu); in gen8_modify_rpcs()
1164 struct intel_sseu sseu) in __intel_context_reconfigure_sseu() argument
1175 if (!memcmp(&ce->sseu, &sseu, sizeof(sseu))) in __intel_context_reconfigure_sseu()
1178 ret = gen8_modify_rpcs(ce, sseu); in __intel_context_reconfigure_sseu()
1180 ce->sseu = sseu; in __intel_context_reconfigure_sseu()
1188 intel_context_reconfigure_sseu(struct intel_context *ce, struct intel_sseu sseu) in intel_context_reconfigure_sseu() argument
1197 ret = __intel_context_reconfigure_sseu(ce, sseu); in intel_context_reconfigure_sseu()
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| /Linux-v5.4/drivers/gpu/drm/i915/gem/selftests/ |
| D | i915_gem_context.c | 839 unsigned int slices = hweight32(ce->engine->sseu.slice_mask); in __sseu_finish()
881 struct intel_sseu sseu) in __sseu_test() argument
890 ret = __intel_context_reconfigure_sseu(ce, sseu); in __sseu_test()
895 hweight32(sseu.slice_mask), spin); in __sseu_test()
922 if (!RUNTIME_INFO(i915)->sseu.has_slice_pg) in __igt_ctx_sseu()
925 if (hweight32(engine->sseu.slice_mask) < 2) in __igt_ctx_sseu()
932 pg_sseu = engine->sseu; in __igt_ctx_sseu()
935 ~(~0 << (hweight32(engine->sseu.subslice_mask) / 2)); in __igt_ctx_sseu()
938 name, flags, hweight32(engine->sseu.slice_mask), in __igt_ctx_sseu()
974 ret = __sseu_test(name, flags, ce, obj, engine->sseu); in __igt_ctx_sseu()
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| /Linux-v5.4/drivers/gpu/drm/i915/gt/uc/ |
| D | intel_guc_ads.c | 101 blob->system_info.slice_enabled = hweight8(RUNTIME_INFO(dev_priv)->sseu.slice_mask); in __guc_ads_init()
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