| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_dpp_cm.c | 138 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_GAMUT_REMAP_C11; in program_gamut_remap()
140 gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_GAMUT_REMAP_C12; in program_gamut_remap()
233 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_OCSC_C11; in dpp1_cm_program_color_matrix()
235 gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_OCSC_C12; in dpp1_cm_program_color_matrix()
280 reg->shifts.exp_region0_lut_offset = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dpp1_cm_get_reg_field()
282 reg->shifts.exp_region0_num_segments = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dpp1_cm_get_reg_field()
284 reg->shifts.exp_region1_lut_offset = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dpp1_cm_get_reg_field()
286 reg->shifts.exp_region1_num_segments = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in dpp1_cm_get_reg_field()
289 reg->shifts.field_region_end = dpp->tf_shift->CM_RGAM_RAMB_EXP_REGION_END_B; in dpp1_cm_get_reg_field()
291 reg->shifts.field_region_end_slope = dpp->tf_shift->CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B; in dpp1_cm_get_reg_field()
[all …]
|
| D | dcn10_cm_common.h | 70 struct xfer_func_shift shifts; member
85 struct cm_color_matrix_shift shifts; member
|
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_i2c_hw.c | 41 dce_i2c_hw->shifts->field_name, dce_i2c_hw->masks->field_name
620 const struct dce_i2c_shift *shifts, in dce_i2c_hw_construct() argument
627 dce_i2c_hw->shifts = shifts; in dce_i2c_hw_construct()
644 const struct dce_i2c_shift *shifts, in dce100_i2c_hw_construct() argument
654 shifts, in dce100_i2c_hw_construct()
679 const struct dce_i2c_shift *shifts, in dce112_i2c_hw_construct() argument
686 shifts, in dce112_i2c_hw_construct()
696 const struct dce_i2c_shift *shifts, in dcn1_i2c_hw_construct() argument
703 shifts, in dcn1_i2c_hw_construct()
714 const struct dce_i2c_shift *shifts, in dcn2_i2c_hw_construct() argument
[all …]
|
| D | dce_i2c_hw.h | 279 const struct dce_i2c_shift *shifts; member
288 const struct dce_i2c_shift *shifts,
296 const struct dce_i2c_shift *shifts,
304 const struct dce_i2c_shift *shifts,
312 const struct dce_i2c_shift *shifts,
321 const struct dce_i2c_shift *shifts,
|
| D | dce_audio.h | 127 const struct dce_audio_shift *shifts; member
135 const struct dce_audio_shift *shifts,
|
| D | dce_audio.c | 46 aud->shifts->field_name, aud->masks->field_name
939 const struct dce_audio_shift *shifts, in dce_audio_create() argument
955 audio->shifts = shifts; in dce_audio_create()
|
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_mpc.c | 148 ocsc_regs.shifts.csc_c11 = mpc20->mpc_shift->MPC_OCSC_C11_A; in mpc2_set_output_csc()
150 ocsc_regs.shifts.csc_c12 = mpc20->mpc_shift->MPC_OCSC_C12_A; in mpc2_set_output_csc()
188 ocsc_regs.shifts.csc_c11 = mpc20->mpc_shift->MPC_OCSC_C11_A; in mpc2_set_ocsc_default()
190 ocsc_regs.shifts.csc_c12 = mpc20->mpc_shift->MPC_OCSC_C12_A; in mpc2_set_ocsc_default()
214 reg->shifts.exp_region0_lut_offset = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in mpc2_ogam_get_reg_field()
216 reg->shifts.exp_region0_num_segments = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
218 reg->shifts.exp_region1_lut_offset = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in mpc2_ogam_get_reg_field()
220 reg->shifts.exp_region1_num_segments = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in mpc2_ogam_get_reg_field()
222 reg->shifts.field_region_end = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_END_B; in mpc2_ogam_get_reg_field()
224 reg->shifts.field_region_end_slope = mpc20->mpc_shift->MPCC_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in mpc2_ogam_get_reg_field()
[all …]
|
| D | dcn20_dpp_cm.c | 210 reg->shifts.exp_region0_lut_offset = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dcn20_dpp_cm_get_reg_field()
212 reg->shifts.exp_region0_num_segments = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dcn20_dpp_cm_get_reg_field()
214 reg->shifts.exp_region1_lut_offset = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dcn20_dpp_cm_get_reg_field()
216 reg->shifts.exp_region1_num_segments = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in dcn20_dpp_cm_get_reg_field()
219 reg->shifts.field_region_end = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION_END_B; in dcn20_dpp_cm_get_reg_field()
221 reg->shifts.field_region_end_slope = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION_END_SLOPE_B; in dcn20_dpp_cm_get_reg_field()
223 reg->shifts.field_region_end_base = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION_END_BASE_B; in dcn20_dpp_cm_get_reg_field()
225 reg->shifts.field_region_linear_slope = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION_LINEAR_SLOPE_B; in dcn20_dpp_cm_get_reg_field()
227 reg->shifts.exp_region_start = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION_START_B; in dcn20_dpp_cm_get_reg_field()
229 reg->shifts.exp_resion_start_segment = dpp->tf_shift->CM_BLNDGAM_RAMA_EXP_REGION_START_SEGMENT_B; in dcn20_dpp_cm_get_reg_field()
|
| D | dcn20_vmid.c | 39 vmid->shifts->field_name, vmid->masks->field_name
|
| D | dcn20_hubbub.c | 39 hubbub1->shifts->field_name, hubbub1->masks->field_name
49 hubbub1->shifts->field_name, hubbub1->masks->field_name
617 hubbub->shifts = hubbub_shift; in hubbub2_construct()
|
| D | dcn20_vmid.h | 84 const struct dcn20_vmid_shift *shifts; member
|
| D | dcn20_hubbub.h | 79 const struct dcn_hubbub_shift *shifts; member
|
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| D | hw_factory_dcn10.c | 156 generic->shifts = &generic_shift[en]; in define_generic_registers()
181 ddc->shifts = &ddc_shift; in define_ddc_registers()
191 hpd->shifts = &hpd_shift; in define_hpd_registers()
|
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| D | hw_factory_dcn21.c | 165 generic->shifts = &generic_shift[en]; in define_generic_registers()
190 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
200 hpd->shifts = &hpd_shift; in define_hpd_registers()
|
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| D | hw_factory_dcn20.c | 188 ddc->shifts = &ddc_shift[en]; in define_ddc_registers()
198 hpd->shifts = &hpd_shift; in define_hpd_registers()
208 generic->shifts = &generic_shift[en]; in define_generic_registers()
|
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
| D | hw_factory_dce110.c | 136 ddc->shifts = &ddc_shift; in define_ddc_registers()
146 hpd->shifts = &hpd_shift; in define_hpd_registers()
|
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/dce80/ |
| D | hw_factory_dce80.c | 136 ddc->shifts = &ddc_shift; in define_ddc_registers()
146 hpd->shifts = &hpd_shift; in define_hpd_registers()
|
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| D | hw_factory_dce120.c | 149 ddc->shifts = &ddc_shift; in define_ddc_registers()
159 hpd->shifts = &hpd_shift; in define_hpd_registers()
|
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/gpio/ |
| D | hw_ddc.h | 34 const struct ddc_sh_mask *shifts; member
|
| D | hw_generic.h | 35 const struct generic_sh_mask *shifts; member
|
| D | hw_hpd.h | 34 const struct hpd_sh_mask *shifts; member
|
| D | hw_generic.c | 40 generic->shifts->field_name, generic->masks->field_name
|
| D | hw_hpd.c | 40 hpd->shifts->field_name, hpd->masks->field_name
|
| /Linux-v5.4/arch/arm/boot/dts/ |
| D | dra62x-clocks.dtsi | 32 * Compared to dm814x, dra62x has different shifts and more mux options.
|
| /Linux-v5.4/arch/arm/kernel/ |
| D | sleep.S | 78 ldmia r0, {r1, r6-r8} @ r1 = mpidr mask (r6,r7,r8) = l[0,1,2] shifts
157 ldmia r2, { r3-r6 } @ r3 = mpidr mask (r4,r5,r6) = l[0,1,2] shifts
|
