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Searched refs:pipe_config (Results 1 – 25 of 40) sorted by relevance

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/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_hdmi.c260 const struct intel_crtc_state *pipe_config) in g4x_infoframes_enabled() argument
334 const struct intel_crtc_state *pipe_config) in ibx_infoframes_enabled() argument
337 enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; in ibx_infoframes_enabled()
414 const struct intel_crtc_state *pipe_config) in cpt_infoframes_enabled() argument
417 enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; in cpt_infoframes_enabled()
487 const struct intel_crtc_state *pipe_config) in vlv_infoframes_enabled() argument
490 enum pipe pipe = to_intel_crtc(pipe_config->base.crtc)->pipe; in vlv_infoframes_enabled()
555 const struct intel_crtc_state *pipe_config) in hsw_infoframes_enabled() argument
558 u32 val = I915_READ(HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder)); in hsw_infoframes_enabled()
1778 struct intel_crtc_state *pipe_config) in intel_hdmi_get_config() argument
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Dintel_display.c118 struct intel_crtc_state *pipe_config);
120 struct intel_crtc_state *pipe_config);
135 const struct intel_crtc_state *pipe_config);
137 const struct intel_crtc_state *pipe_config);
218 const struct intel_crtc_state *pipe_config) in intel_fdi_link_freq() argument
221 return pipe_config->port_clock; /* SPLL */ in intel_fdi_link_freq()
1376 const struct intel_crtc_state *pipe_config) in _vlv_enable_pll() argument
1381 I915_WRITE(DPLL(pipe), pipe_config->dpll_hw_state.dpll); in _vlv_enable_pll()
1390 const struct intel_crtc_state *pipe_config) in vlv_enable_pll() argument
1400 if (pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) in vlv_enable_pll()
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Dintel_dp_mst.c91 struct intel_crtc_state *pipe_config, in intel_dp_mst_compute_config() argument
102 &pipe_config->base.adjusted_mode; in intel_dp_mst_compute_config()
110 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dp_mst_compute_config()
111 pipe_config->has_pch_encoder = false; in intel_dp_mst_compute_config()
114 pipe_config->has_audio = in intel_dp_mst_compute_config()
117 pipe_config->has_audio = in intel_dp_mst_compute_config()
130 limits.min_bpp = intel_dp_min_bpp(pipe_config); in intel_dp_mst_compute_config()
139 limits.max_bpp = min(pipe_config->pipe_bpp, 24); in intel_dp_mst_compute_config()
141 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits); in intel_dp_mst_compute_config()
143 ret = intel_dp_mst_compute_link_config(encoder, pipe_config, in intel_dp_mst_compute_config()
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Dintel_lvds.c120 struct intel_crtc_state *pipe_config) in intel_lvds_get_config() argument
126 pipe_config->output_types |= BIT(INTEL_OUTPUT_LVDS); in intel_lvds_get_config()
138 pipe_config->base.adjusted_mode.flags |= flags; in intel_lvds_get_config()
141 pipe_config->gmch_pfit.lvds_border_bits = in intel_lvds_get_config()
148 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE; in intel_lvds_get_config()
151 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_lvds_get_config()
228 const struct intel_crtc_state *pipe_config, in intel_pre_enable_lvds() argument
233 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in intel_pre_enable_lvds()
234 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; in intel_pre_enable_lvds()
241 pipe_config->shared_dpll); in intel_pre_enable_lvds()
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Dintel_ddi.c1460 static void ddi_dotclock_get(struct intel_crtc_state *pipe_config) in ddi_dotclock_get() argument
1464 if (pipe_config->has_pch_encoder) in ddi_dotclock_get()
1465 dotclock = intel_dotclock_calculate(pipe_config->port_clock, in ddi_dotclock_get()
1466 &pipe_config->fdi_m_n); in ddi_dotclock_get()
1467 else if (intel_crtc_has_dp_encoder(pipe_config)) in ddi_dotclock_get()
1468 dotclock = intel_dotclock_calculate(pipe_config->port_clock, in ddi_dotclock_get()
1469 &pipe_config->dp_m_n); in ddi_dotclock_get()
1470 else if (pipe_config->has_hdmi_sink && pipe_config->pipe_bpp > 24) in ddi_dotclock_get()
1471 dotclock = pipe_config->port_clock * 24 / pipe_config->pipe_bpp; in ddi_dotclock_get()
1473 dotclock = pipe_config->port_clock; in ddi_dotclock_get()
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Dintel_crt.c131 struct intel_crtc_state *pipe_config) in intel_crt_get_config() argument
133 pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG); in intel_crt_get_config()
135 pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder); in intel_crt_get_config()
137 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_crt_get_config()
141 struct intel_crtc_state *pipe_config) in hsw_crt_get_config() argument
145 intel_ddi_get_config(encoder, pipe_config); in hsw_crt_get_config()
147 pipe_config->base.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC | in hsw_crt_get_config()
151 pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder); in hsw_crt_get_config()
153 pipe_config->base.adjusted_mode.crtc_clock = lpt_get_iclkip(dev_priv); in hsw_crt_get_config()
357 struct intel_crtc_state *pipe_config, in intel_crt_compute_config() argument
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Dintel_dp.c1728 struct intel_crtc_state *pipe_config) in intel_dp_set_clock() argument
1750 if (pipe_config->port_clock == divisor[i].clock) { in intel_dp_set_clock()
1751 pipe_config->dpll = divisor[i].dpll; in intel_dp_set_clock()
1752 pipe_config->clock_set = true; in intel_dp_set_clock()
1833 const struct intel_crtc_state *pipe_config) in intel_dp_source_supports_fec() argument
1838 pipe_config->cpu_transcoder != TRANSCODER_A; in intel_dp_source_supports_fec()
1842 const struct intel_crtc_state *pipe_config) in intel_dp_supports_fec() argument
1844 return intel_dp_source_supports_fec(intel_dp, pipe_config) && in intel_dp_supports_fec()
1849 const struct intel_crtc_state *pipe_config) in intel_dp_source_supports_dsc() argument
1854 pipe_config->cpu_transcoder != TRANSCODER_A; in intel_dp_source_supports_dsc()
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Dintel_dvo.c163 struct intel_crtc_state *pipe_config) in intel_dvo_get_config() argument
169 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); in intel_dvo_get_config()
181 pipe_config->base.adjusted_mode.flags |= flags; in intel_dvo_get_config()
183 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
201 const struct intel_crtc_state *pipe_config, in intel_enable_dvo() argument
210 &pipe_config->base.mode, in intel_enable_dvo()
211 &pipe_config->base.adjusted_mode); in intel_enable_dvo()
250 struct intel_crtc_state *pipe_config, in intel_dvo_compute_config() argument
256 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; in intel_dvo_compute_config()
270 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dvo_compute_config()
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Dicl_dsi.c266 const struct intel_crtc_state *pipe_config) in configure_dual_link_mode() argument
279 &pipe_config->base.adjusted_mode; in configure_dual_link_mode()
624 const struct intel_crtc_state *pipe_config) in gen11_dsi_configure_transcoder() argument
628 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in gen11_dsi_configure_transcoder()
722 configure_dual_link_mode(encoder, pipe_config); in gen11_dsi_configure_transcoder()
766 const struct intel_crtc_state *pipe_config) in gen11_dsi_set_transcoder_timings() argument
771 &pipe_config->base.adjusted_mode; in gen11_dsi_set_transcoder_timings()
958 const struct intel_crtc_state *pipe_config) in gen11_dsi_enable_port_and_phy() argument
981 gen11_dsi_configure_transcoder(encoder, pipe_config); in gen11_dsi_enable_port_and_phy()
1028 const struct intel_crtc_state *pipe_config, in gen11_dsi_pre_pll_enable() argument
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Dvlv_dsi.c257 struct intel_crtc_state *pipe_config, in intel_dsi_compute_config() argument
264 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dsi_compute_config()
266 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; in intel_dsi_compute_config()
270 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dsi_compute_config()
276 intel_gmch_panel_fitting(crtc, pipe_config, in intel_dsi_compute_config()
279 intel_pch_panel_fitting(crtc, pipe_config, in intel_dsi_compute_config()
290 pipe_config->pipe_bpp = 24; in intel_dsi_compute_config()
292 pipe_config->pipe_bpp = 18; in intel_dsi_compute_config()
301 pipe_config->cpu_transcoder = TRANSCODER_DSI_C; in intel_dsi_compute_config()
303 pipe_config->cpu_transcoder = TRANSCODER_DSI_A; in intel_dsi_compute_config()
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Dintel_panel.c178 struct intel_crtc_state *pipe_config, in intel_pch_panel_fitting() argument
181 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; in intel_pch_panel_fitting()
185 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && in intel_pch_panel_fitting()
186 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h && in intel_pch_panel_fitting()
187 pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR420) in intel_pch_panel_fitting()
192 width = pipe_config->pipe_src_w; in intel_pch_panel_fitting()
193 height = pipe_config->pipe_src_h; in intel_pch_panel_fitting()
202 * pipe_config->pipe_src_h; in intel_pch_panel_fitting()
203 u32 scaled_height = pipe_config->pipe_src_w in intel_pch_panel_fitting()
206 width = scaled_height / pipe_config->pipe_src_h; in intel_pch_panel_fitting()
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Dintel_pipe_crc.c290 struct intel_crtc_state *pipe_config; in intel_crtc_crc_setup_workarounds() local
306 pipe_config = intel_atomic_get_crtc_state(state, crtc); in intel_crtc_crc_setup_workarounds()
307 if (IS_ERR(pipe_config)) { in intel_crtc_crc_setup_workarounds()
308 ret = PTR_ERR(pipe_config); in intel_crtc_crc_setup_workarounds()
312 pipe_config->base.mode_changed = pipe_config->has_psr; in intel_crtc_crc_setup_workarounds()
313 pipe_config->crc_enabled = enable; in intel_crtc_crc_setup_workarounds()
316 pipe_config->base.active && crtc->pipe == PIPE_A && in intel_crtc_crc_setup_workarounds()
317 pipe_config->cpu_transcoder == TRANSCODER_EDP) in intel_crtc_crc_setup_workarounds()
318 pipe_config->base.mode_changed = true; in intel_crtc_crc_setup_workarounds()
Dintel_sdvo.c1242 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) in i9xx_adjust_sdvo_tv_clock() argument
1244 unsigned dotclock = pipe_config->port_clock; in i9xx_adjust_sdvo_tv_clock()
1245 struct dpll *clock = &pipe_config->dpll; in i9xx_adjust_sdvo_tv_clock()
1267 pipe_config->clock_set = true; in i9xx_adjust_sdvo_tv_clock()
1271 struct intel_crtc_state *pipe_config, in intel_sdvo_compute_config() argument
1279 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; in intel_sdvo_compute_config()
1280 struct drm_display_mode *mode = &pipe_config->base.mode; in intel_sdvo_compute_config()
1283 pipe_config->pipe_bpp = 8*3; in intel_sdvo_compute_config()
1284 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_sdvo_compute_config()
1287 pipe_config->has_pch_encoder = true; in intel_sdvo_compute_config()
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Dintel_panel.h29 struct intel_crtc_state *pipe_config,
32 struct intel_crtc_state *pipe_config,
Dintel_vdsc.c323 struct intel_crtc_state *pipe_config) in intel_dp_compute_dsc_params() argument
325 struct drm_dsc_config *vdsc_cfg = &pipe_config->dp_dsc_cfg; in intel_dp_compute_dsc_params()
326 u16 compressed_bpp = pipe_config->dsc_params.compressed_bpp; in intel_dp_compute_dsc_params()
332 vdsc_cfg->pic_width = pipe_config->base.adjusted_mode.crtc_hdisplay; in intel_dp_compute_dsc_params()
333 vdsc_cfg->pic_height = pipe_config->base.adjusted_mode.crtc_vdisplay; in intel_dp_compute_dsc_params()
335 pipe_config->dsc_params.slice_count); in intel_dp_compute_dsc_params()
382 vdsc_cfg->bits_per_component = pipe_config->pipe_bpp / 3; in intel_dp_compute_dsc_params()
Dintel_tv.c919 const struct intel_crtc_state *pipe_config, in intel_enable_tv() argument
927 to_intel_crtc(pipe_config->base.crtc)->pipe); in intel_enable_tv()
1085 struct intel_crtc_state *pipe_config) in intel_tv_get_config() argument
1089 &pipe_config->base.adjusted_mode; in intel_tv_get_config()
1097 pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT); in intel_tv_get_config()
1119 tv_mode.clock = pipe_config->port_clock; in intel_tv_get_config()
1184 struct intel_crtc_state *pipe_config, in intel_tv_compute_config() argument
1192 &pipe_config->base.adjusted_mode; in intel_tv_compute_config()
1202 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_tv_compute_config()
1205 pipe_config->pipe_bpp = 8*3; in intel_tv_compute_config()
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Dintel_dp.h33 struct intel_crtc_state *pipe_config,
60 struct intel_crtc_state *pipe_config,
Dintel_vdsc.h17 struct intel_crtc_state *pipe_config);
Dintel_lspcon.h34 const struct intel_crtc_state *pipe_config);
Dintel_hdmi.h33 struct intel_crtc_state *pipe_config,
Dintel_ddi.h36 struct intel_crtc_state *pipe_config);
Dintel_overlay.c913 const struct intel_crtc_state *pipe_config = in check_overlay_dst() local
916 if (rec->dst_x < pipe_config->pipe_src_w && in check_overlay_dst()
917 rec->dst_x + rec->dst_width <= pipe_config->pipe_src_w && in check_overlay_dst()
918 rec->dst_y < pipe_config->pipe_src_h && in check_overlay_dst()
919 rec->dst_y + rec->dst_height <= pipe_config->pipe_src_h) in check_overlay_dst()
/Linux-v5.4/drivers/usb/renesas_usbhs/
Dpipe.c477 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhsp_setup_pipebuff() local
489 buff_size = pipe_config->bufsize; in usbhsp_setup_pipebuff()
490 bufnmb = pipe_config->bufnum; in usbhsp_setup_pipebuff()
507 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhs_pipe_config_update() local
509 u16 dblb = pipe_config->double_buf ? DBLB : 0; in usbhs_pipe_config_update()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/core/
Ddc_debug.c162 plane_state->tiling_info.gfx8.pipe_config, in pre_surface_trace()
251 update->plane_info->tiling_info.gfx8.pipe_config, in update_surface_trace()
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_debugfs.c2691 struct intel_crtc_state *pipe_config; in intel_scaler_info() local
2695 pipe_config = to_intel_crtc_state(intel_crtc->base.state); in intel_scaler_info()
2701 pipe_config->scaler_state.scaler_users, in intel_scaler_info()
2702 pipe_config->scaler_state.scaler_id); in intel_scaler_info()
2706 &pipe_config->scaler_state.scalers[i]; in intel_scaler_info()
2731 struct intel_crtc_state *pipe_config; in i915_display_info() local
2734 pipe_config = to_intel_crtc_state(crtc->base.state); in i915_display_info()
2738 yesno(pipe_config->base.active), in i915_display_info()
2739 pipe_config->pipe_src_w, pipe_config->pipe_src_h, in i915_display_info()
2740 yesno(pipe_config->dither), pipe_config->pipe_bpp); in i915_display_info()
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