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Searched refs:mmSDMA0_STATUS_REG (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/sdma0/
Dsdma0_4_1_offset.h86 #define mmSDMA0_STATUS_REG macro
Dsdma0_4_0_offset.h88 #define mmSDMA0_STATUS_REG 0x0025 macro
Dsdma0_4_2_2_offset.h88 #define mmSDMA0_STATUS_REG macro
Dsdma0_4_2_offset.h88 #define mmSDMA0_STATUS_REG macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h169 #define mmSDMA0_STATUS_REG 0x340d macro
Doss_3_0_1_d.h166 #define mmSDMA0_STATUS_REG 0x340d macro
Doss_2_0_d.h232 #define mmSDMA0_STATUS_REG 0x340d macro
Doss_3_0_d.h303 #define mmSDMA0_STATUS_REG 0x340d macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dsdma_v5_0.c1308 u32 tmp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_STATUS_REG)); in sdma_v5_0_is_idle()
1324 sdma0 = RREG32(sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_STATUS_REG)); in sdma_v5_0_wait_for_idle()
1325 sdma1 = RREG32(sdma_v5_0_get_reg_offset(adev, 1, mmSDMA0_STATUS_REG)); in sdma_v5_0_wait_for_idle()
Dvi.c482 {mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET},
483 {mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET},
Dnv.c169 { SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},
Dsdma_v4_0.c1950 u32 tmp = RREG32_SDMA(i, mmSDMA0_STATUS_REG); in sdma_v4_0_is_idle()
1967 sdma[j] = RREG32_SDMA(j, mmSDMA0_STATUS_REG); in sdma_v4_0_wait_for_idle()
Dsoc15.c330 { SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h60 #define mmSDMA0_STATUS_REG macro