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Searched refs:mmJPEG_CGC_GATE (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_offset.h138 #define mmJPEG_CGC_GATE … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h298 #define mmJPEG_CGC_GATE … macro
Dvcn_2_5_offset.h351 #define mmJPEG_CGC_GATE … macro
Dvcn_2_0_0_offset.h348 #define mmJPEG_CGC_GATE … macro
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dvcn_v2_5.c632 tmp = RREG32_SOC15(VCN, i, mmJPEG_CGC_GATE); in jpeg_v2_5_start()
637 WREG32_SOC15(VCN, i, mmJPEG_CGC_GATE, tmp); in jpeg_v2_5_start()
697 tmp = RREG32_SOC15(VCN, i, mmJPEG_CGC_GATE); in jpeg_v2_5_stop()
702 WREG32_SOC15(VCN, i, mmJPEG_CGC_GATE, tmp); in jpeg_v2_5_stop()
Dvcn_v1_0.c457 data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE); in vcn_v1_0_disable_clock_gating()
459 WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data); in vcn_v1_0_disable_clock_gating()
582 data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE); in vcn_v1_0_enable_clock_gating()
584 WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data); in vcn_v1_0_enable_clock_gating()
646 WREG32_SOC15_DPG_MODE(UVD, 0, mmJPEG_CGC_GATE, 0, 0xFFFFFFFF, sram_sel); in vcn_v1_0_clock_gating_dpg_mode()
Dvcn_v2_0.c696 tmp = RREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE); in jpeg_v2_0_start()
702 WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, tmp); in jpeg_v2_0_start()
753 tmp = RREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE); in jpeg_v2_0_stop()
759 WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, tmp); in jpeg_v2_0_stop()