| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | cik_ih.c | 63 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cik_ih_enable_interrupts()
68 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_enable_interrupts()
81 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cik_ih_disable_interrupts()
86 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_disable_interrupts()
139 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_irq_init()
203 tmp = RREG32(mmIH_RB_CNTL); in cik_ih_get_wptr()
205 WREG32(mmIH_RB_CNTL, tmp); in cik_ih_get_wptr()
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| D | cz_ih.c | 63 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cz_ih_enable_interrupts()
68 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_enable_interrupts()
81 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cz_ih_disable_interrupts()
86 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_disable_interrupts()
141 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_irq_init()
205 tmp = RREG32(mmIH_RB_CNTL); in cz_ih_get_wptr()
207 WREG32(mmIH_RB_CNTL, tmp); in cz_ih_get_wptr()
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| D | iceland_ih.c | 63 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in iceland_ih_enable_interrupts()
68 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_enable_interrupts()
81 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in iceland_ih_disable_interrupts()
86 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_disable_interrupts()
141 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_irq_init()
205 tmp = RREG32(mmIH_RB_CNTL); in iceland_ih_get_wptr()
207 WREG32(mmIH_RB_CNTL, tmp); in iceland_ih_get_wptr()
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| D | tonga_ih.c | 62 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in tonga_ih_enable_interrupts()
66 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in tonga_ih_enable_interrupts()
79 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in tonga_ih_disable_interrupts()
83 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in tonga_ih_disable_interrupts()
135 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in tonga_ih_irq_init()
207 tmp = RREG32(mmIH_RB_CNTL); in tonga_ih_get_wptr()
209 WREG32(mmIH_RB_CNTL, tmp); in tonga_ih_get_wptr()
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| D | navi10_ih.c | 47 u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); in navi10_ih_enable_interrupts()
51 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in navi10_ih_enable_interrupts()
64 u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); in navi10_ih_disable_interrupts()
68 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in navi10_ih_disable_interrupts()
126 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); in navi10_ih_irq_init()
140 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in navi10_ih_irq_init()
236 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL); in navi10_ih_get_wptr()
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| D | vega10_ih.c | 49 u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); in vega10_ih_enable_interrupts()
59 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in vega10_ih_enable_interrupts()
105 u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); in vega10_ih_disable_interrupts()
115 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in vega10_ih_disable_interrupts()
236 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL); in vega10_ih_irq_init()
253 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL, ih_rb_cntl); in vega10_ih_irq_init()
411 reg = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL); in vega10_ih_get_wptr()
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| /Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | oss_1_0_d.h | 231 #define mmIH_RB_CNTL 0x0F80 macro
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| D | osssys_4_0_1_offset.h | 120 #define mmIH_RB_CNTL … macro
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| D | osssys_4_0_offset.h | 120 #define mmIH_RB_CNTL … macro
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| D | osssys_5_0_0_offset.h | 120 #define mmIH_RB_CNTL … macro
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| D | oss_2_4_d.h | 43 #define mmIH_RB_CNTL 0xe30 macro
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| D | oss_3_0_1_d.h | 43 #define mmIH_RB_CNTL 0xe30 macro
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| D | oss_2_0_d.h | 43 #define mmIH_RB_CNTL 0xf80 macro
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| D | oss_3_0_d.h | 43 #define mmIH_RB_CNTL 0xe30 macro
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