Searched refs:llsc (Results 1 – 5 of 5) sorted by relevance
36 #define ARM64_LSE_ATOMIC_INSN(llsc, lse) \ argument37 ALTERNATIVE(llsc, lse, ARM64_HAS_LSE_ATOMICS)45 #define ARM64_LSE_ATOMIC_INSN(llsc, lse) llsc argument
29 # an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction47 cflags-$(CONFIG_CPU_LOONGSON3) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
24 u64 llsc; member
2018 MIPS_R2_STATS(llsc); in mipsr2_decoder()2076 MIPS_R2_STATS(llsc); in mipsr2_decoder()2137 MIPS_R2_STATS(llsc); in mipsr2_decoder()2200 MIPS_R2_STATS(llsc); in mipsr2_decoder()2273 (unsigned long)__this_cpu_read(mipsr2emustats.llsc), in mipsr2_emul_show()2274 (unsigned long)__this_cpu_read(mipsr2bdemustats.llsc)); in mipsr2_emul_show()2328 __this_cpu_write((mipsr2emustats).llsc, 0); in mipsr2_clear_show()2329 __this_cpu_write((mipsr2bdemustats).llsc, 0); in mipsr2_clear_show()
1423 Loongson 3 processors have the llsc issues which require workarounds.
