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Searched refs:ictrl (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/arch/arc/kernel/
Dintc-arcv2.c44 } ictrl; in arc_init_IRQ() local
46 *(unsigned int *)&ictrl = 0; in arc_init_IRQ()
49 ictrl.save_nr_gpr_pairs = 6; /* r0 to r11 (r12 saved manually) */ in arc_init_IRQ()
50 ictrl.save_blink = 1; in arc_init_IRQ()
51 ictrl.save_lp_regs = 1; /* LP_COUNT, LP_START, LP_END */ in arc_init_IRQ()
52 ictrl.save_u_to_u = 0; /* user ctxt saved on kernel stack */ in arc_init_IRQ()
53 ictrl.save_idx_regs = 1; /* JLI, LDI, EI */ in arc_init_IRQ()
56 WRITE_AUX(AUX_IRQ_CTRL, ictrl); in arc_init_IRQ()
/Linux-v5.4/Documentation/driver-api/
Ddevice-io.rst96 WRT_REG_WORD(&reg->ictrl, 0);
102 RD_REG_WORD(&reg->ictrl);
/Linux-v5.4/drivers/scsi/
Dqla1280.c742 RD_REG_WORD(&reg->ictrl), RD_REG_WORD(&reg->istatus)); in qla1280_mailbox_timeout()
844 RD_REG_WORD(&ha->iobase->ictrl), jiffies); in qla1280_error_action()
1062 WRT_REG_WORD(&ha->iobase->ictrl, 0); in qla1280_disable_intrs()
1063 RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */ in qla1280_disable_intrs()
1070 WRT_REG_WORD(&ha->iobase->ictrl, (ISP_EN_INT | ISP_EN_RISC)); in qla1280_enable_intrs()
1071 RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */ in qla1280_enable_intrs()
1566 WRT_REG_WORD(&reg->ictrl, ISP_RESET); in qla1280_chip_diag()
1576 data = qla1280_debounce_register(&reg->ictrl); in qla1280_chip_diag()
1582 data = RD_REG_WORD(&reg->ictrl); in qla1280_chip_diag()
2682 WRT_REG_WORD(&reg->ictrl, ISP_RESET); in qla1280_reset_adapter()
Dqla1280.h133 uint16_t ictrl; /* Interface control */ member
/Linux-v5.4/drivers/scsi/qla2xxx/
Dqla_dbg.c1150 WRT_REG_DWORD(&reg->ictrl, 0); in qla24xx_fw_dump()
1151 RD_REG_DWORD(&reg->ictrl); in qla24xx_fw_dump()
1426 WRT_REG_DWORD(&reg->ictrl, 0); in qla25xx_fw_dump()
1427 RD_REG_DWORD(&reg->ictrl); in qla25xx_fw_dump()
1750 WRT_REG_DWORD(&reg->ictrl, 0); in qla81xx_fw_dump()
1751 RD_REG_DWORD(&reg->ictrl); in qla81xx_fw_dump()
2098 WRT_REG_DWORD(&reg->ictrl, 0); in qla83xx_fw_dump()
2099 RD_REG_DWORD(&reg->ictrl); in qla83xx_fw_dump()
Dqla_mbx.c413 uint32_t ictrl, host_status, hccr; in qla2x00_mailbox_command() local
422 ictrl = RD_REG_DWORD(&reg->isp24.ictrl); in qla2x00_mailbox_command()
429 command, ictrl, jiffies, mb[0], mb[1], mb[2], mb[3], in qla2x00_mailbox_command()
434 ictrl = RD_REG_WORD(&reg->isp.ictrl); in qla2x00_mailbox_command()
437 "mb[0]=0x%x\n", command, ictrl, jiffies, mb[0]); in qla2x00_mailbox_command()
444 if (w == 0xffff || ictrl == 0xffffffff || in qla2x00_mailbox_command()
578 RD_REG_DWORD(&reg->isp24.ictrl), in qla2x00_mailbox_command()
584 RD_REG_WORD(&reg->isp.ictrl), in qla2x00_mailbox_command()
Dqla_os.c1876 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC); in qla2x00_enable_intrs()
1877 RD_REG_WORD(&reg->ictrl); in qla2x00_enable_intrs()
1891 WRT_REG_WORD(&reg->ictrl, 0); in qla2x00_disable_intrs()
1892 RD_REG_WORD(&reg->ictrl); in qla2x00_disable_intrs()
1904 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT); in qla24xx_enable_intrs()
1905 RD_REG_DWORD(&reg->ictrl); in qla24xx_enable_intrs()
1919 WRT_REG_DWORD(&reg->ictrl, 0); in qla24xx_disable_intrs()
1920 RD_REG_DWORD(&reg->ictrl); in qla24xx_disable_intrs()
Dqla_fw.h1028 uint32_t ictrl; /* Interrupt control. */ member
Dqla_def.h670 uint16_t ictrl; /* Interrupt control */ member