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Searched refs:hws (Results 1 – 25 of 141) sorted by relevance

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/Linux-v5.4/drivers/clk/imx/
Dclk-imx7d.c376 static struct clk_hw **hws; variable
397 clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, in imx7d_clocks_init()
403 hws = clk_hw_data->hws; in imx7d_clocks_init()
405 hws[IMX7D_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx7d_clocks_init()
406 hws[IMX7D_OSC_24M_CLK] = __clk_get_hw(of_clk_get_by_name(ccm_node, "osc")); in imx7d_clocks_init()
407 hws[IMX7D_CKIL] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ckil")); in imx7d_clocks_init()
414hws[IMX7D_PLL_ARM_MAIN_SRC] = imx_clk_hw_mux("pll_arm_main_src", base + 0x60, 14, 2, pll_bypass_s… in imx7d_clocks_init()
415hws[IMX7D_PLL_DRAM_MAIN_SRC] = imx_clk_hw_mux("pll_dram_main_src", base + 0x70, 14, 2, pll_bypass_… in imx7d_clocks_init()
416hws[IMX7D_PLL_SYS_MAIN_SRC] = imx_clk_hw_mux("pll_sys_main_src", base + 0xb0, 14, 2, pll_bypass_s… in imx7d_clocks_init()
417hws[IMX7D_PLL_ENET_MAIN_SRC] = imx_clk_hw_mux("pll_enet_main_src", base + 0xe0, 14, 2, pll_bypass_… in imx7d_clocks_init()
[all …]
Dclk-imx6ul.c71 static struct clk_hw **hws; variable
119 clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, in imx6ul_clocks_init()
125 hws = clk_hw_data->hws; in imx6ul_clocks_init()
127 hws[IMX6UL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx6ul_clocks_init()
129 hws[IMX6UL_CLK_CKIL] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ckil")); in imx6ul_clocks_init()
130 hws[IMX6UL_CLK_OSC] = __clk_get_hw(of_clk_get_by_name(ccm_node, "osc")); in imx6ul_clocks_init()
133 hws[IMX6UL_CLK_IPP_DI0] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di0")); in imx6ul_clocks_init()
134 hws[IMX6UL_CLK_IPP_DI1] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di1")); in imx6ul_clocks_init()
141hws[IMX6UL_PLL1_BYPASS_SRC] = imx_clk_hw_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src… in imx6ul_clocks_init()
142hws[IMX6UL_PLL2_BYPASS_SRC] = imx_clk_hw_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src… in imx6ul_clocks_init()
[all …]
Dclk-imx6sx.c84 static struct clk_hw **hws; variable
132 clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, in imx6sx_clocks_init()
138 hws = clk_hw_data->hws; in imx6sx_clocks_init()
140 hws[IMX6SX_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx6sx_clocks_init()
142 hws[IMX6SX_CLK_CKIL] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ckil")); in imx6sx_clocks_init()
143 hws[IMX6SX_CLK_OSC] = __clk_get_hw(of_clk_get_by_name(ccm_node, "osc")); in imx6sx_clocks_init()
146 hws[IMX6SX_CLK_IPP_DI0] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di0")); in imx6sx_clocks_init()
147 hws[IMX6SX_CLK_IPP_DI1] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di1")); in imx6sx_clocks_init()
150 hws[IMX6SX_CLK_ANACLK1] = __clk_get_hw(of_clk_get_by_name(ccm_node, "anaclk1")); in imx6sx_clocks_init()
151 hws[IMX6SX_CLK_ANACLK2] = __clk_get_hw(of_clk_get_by_name(ccm_node, "anaclk2")); in imx6sx_clocks_init()
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Dclk-imx6sll.c56 static struct clk_hw **hws; variable
100 clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, in imx6sll_clocks_init()
106 hws = clk_hw_data->hws; in imx6sll_clocks_init()
108 hws[IMX6SLL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx6sll_clocks_init()
110 hws[IMX6SLL_CLK_CKIL] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ckil")); in imx6sll_clocks_init()
111 hws[IMX6SLL_CLK_OSC] = __clk_get_hw(of_clk_get_by_name(ccm_node, "osc")); in imx6sll_clocks_init()
114 hws[IMX6SLL_CLK_IPP_DI0] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di0")); in imx6sll_clocks_init()
115 hws[IMX6SLL_CLK_IPP_DI1] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di1")); in imx6sll_clocks_init()
131hws[IMX6SLL_PLL1_BYPASS_SRC] = imx_clk_hw_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_sr… in imx6sll_clocks_init()
132hws[IMX6SLL_PLL2_BYPASS_SRC] = imx_clk_hw_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_sr… in imx6sll_clocks_init()
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Dclk-imx6q.c91 static struct clk_hw **hws; variable
276 clk_set_parent(hws[IMX6QDL_CLK_PERIPH2_CLK2_SEL]->clk, in mmdc_ch1_disable()
277 hws[IMX6QDL_CLK_PLL3_USB_OTG]->clk); in mmdc_ch1_disable()
351 (clk_get_parent(hws[IMX6QDL_CLK_PERIPH_PRE]->clk) == in init_ldb_clks()
352 hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk)) { in init_ldb_clks()
404 if (clk_get_parent(hws[IMX6QDL_CLK_PERIPH_PRE]->clk) == in disable_anatop_clocks()
405 hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk) in disable_anatop_clocks()
444 clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, in imx6q_clocks_init()
450 hws = clk_hw_data->hws; in imx6q_clocks_init()
452 hws[IMX6QDL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx6q_clocks_init()
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Dclk-imx6sl.c98 static struct clk_hw **hws; variable
194 clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, in imx6sl_clocks_init()
200 hws = clk_hw_data->hws; in imx6sl_clocks_init()
202 hws[IMX6SL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0); in imx6sl_clocks_init()
203 hws[IMX6SL_CLK_CKIL] = imx_obtain_fixed_clock_hw("ckil", 0); in imx6sl_clocks_init()
204 hws[IMX6SL_CLK_OSC] = imx_obtain_fixed_clock_hw("osc", 0); in imx6sl_clocks_init()
206 hws[IMX6SL_CLK_ANACLK1] = imx_obtain_fixed_clock_hw("anaclk1", 0); in imx6sl_clocks_init()
213hws[IMX6SL_PLL1_BYPASS_SRC] = imx_clk_hw_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src… in imx6sl_clocks_init()
214hws[IMX6SL_PLL2_BYPASS_SRC] = imx_clk_hw_mux("pll2_bypass_src", base + 0x30, 14, 1, pll_bypass_src… in imx6sl_clocks_init()
215hws[IMX6SL_PLL3_BYPASS_SRC] = imx_clk_hw_mux("pll3_bypass_src", base + 0x10, 14, 1, pll_bypass_src… in imx6sl_clocks_init()
[all …]
/Linux-v5.4/drivers/clk/
Dclk-efm32gg.c23 struct clk_hw **hws; in efm32gg_cmu_init() local
25 clk_data = kzalloc(struct_size(clk_data, hws, CMU_MAX_CLKS), in efm32gg_cmu_init()
31 hws = clk_data->hws; in efm32gg_cmu_init()
34 hws[i] = ERR_PTR(-ENOENT); in efm32gg_cmu_init()
42 hws[clk_HFXO] = clk_hw_register_fixed_rate(NULL, "HFXO", NULL, 0, in efm32gg_cmu_init()
45 hws[clk_HFPERCLKUSART0] = clk_hw_register_gate(NULL, "HFPERCLK.USART0", in efm32gg_cmu_init()
47 hws[clk_HFPERCLKUSART1] = clk_hw_register_gate(NULL, "HFPERCLK.USART1", in efm32gg_cmu_init()
49 hws[clk_HFPERCLKUSART2] = clk_hw_register_gate(NULL, "HFPERCLK.USART2", in efm32gg_cmu_init()
51 hws[clk_HFPERCLKUART0] = clk_hw_register_gate(NULL, "HFPERCLK.UART0", in efm32gg_cmu_init()
53 hws[clk_HFPERCLKUART1] = clk_hw_register_gate(NULL, "HFPERCLK.UART1", in efm32gg_cmu_init()
[all …]
Dclk-clps711x.c54 clps711x_clk = kzalloc(struct_size(clps711x_clk, clk_data.hws, in clps711x_clk_init_dt()
106 clps711x_clk->clk_data.hws[CLPS711X_CLK_DUMMY] = in clps711x_clk_init_dt()
108 clps711x_clk->clk_data.hws[CLPS711X_CLK_CPU] = in clps711x_clk_init_dt()
110 clps711x_clk->clk_data.hws[CLPS711X_CLK_BUS] = in clps711x_clk_init_dt()
112 clps711x_clk->clk_data.hws[CLPS711X_CLK_PLL] = in clps711x_clk_init_dt()
114 clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMERREF] = in clps711x_clk_init_dt()
116 clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER1] = in clps711x_clk_init_dt()
120 clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER2] = in clps711x_clk_init_dt()
124 clps711x_clk->clk_data.hws[CLPS711X_CLK_PWM] = in clps711x_clk_init_dt()
126 clps711x_clk->clk_data.hws[CLPS711X_CLK_SPIREF] = in clps711x_clk_init_dt()
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Dclk-ast2600.c448 aspeed_g6_clk_data->hws[ASPEED_CLK_UART] = hw; in aspeed_g6_clk_probe()
459 aspeed_g6_clk_data->hws[ASPEED_CLK_UARTX] = hw; in aspeed_g6_clk_probe()
473 aspeed_g6_clk_data->hws[ASPEED_CLK_EMMC] = hw; in aspeed_g6_clk_probe()
487 aspeed_g6_clk_data->hws[ASPEED_CLK_SDIO] = hw; in aspeed_g6_clk_probe()
496 aspeed_g6_clk_data->hws[ASPEED_CLK_MAC12] = hw; in aspeed_g6_clk_probe()
505 aspeed_g6_clk_data->hws[ASPEED_CLK_MAC34] = hw; in aspeed_g6_clk_probe()
514 aspeed_g6_clk_data->hws[ASPEED_CLK_LHCLK] = hw; in aspeed_g6_clk_probe()
525 aspeed_g6_clk_data->hws[ASPEED_CLK_D1CLK] = hw; in aspeed_g6_clk_probe()
537 aspeed_g6_clk_data->hws[ASPEED_CLK_BCLK] = hw; in aspeed_g6_clk_probe()
546 aspeed_g6_clk_data->hws[ASPEED_CLK_VCLK] = hw; in aspeed_g6_clk_probe()
[all …]
Dclk-aspeed.c430 aspeed_clk_data->hws[ASPEED_CLK_UART] = hw; in aspeed_clk_probe()
440 aspeed_clk_data->hws[ASPEED_CLK_MPLL] = hw; in aspeed_clk_probe()
454 aspeed_clk_data->hws[ASPEED_CLK_SDIO] = hw; in aspeed_clk_probe()
463 aspeed_clk_data->hws[ASPEED_CLK_MAC] = hw; in aspeed_clk_probe()
472 aspeed_clk_data->hws[ASPEED_CLK_LHCLK] = hw; in aspeed_clk_probe()
481 aspeed_clk_data->hws[ASPEED_CLK_BCLK] = hw; in aspeed_clk_probe()
488 aspeed_clk_data->hws[ASPEED_CLK_24M] = hw; in aspeed_clk_probe()
496 aspeed_clk_data->hws[ASPEED_CLK_ECLK_MUX] = hw; in aspeed_clk_probe()
504 aspeed_clk_data->hws[ASPEED_CLK_ECLK] = hw; in aspeed_clk_probe()
536 aspeed_clk_data->hws[i] = hw; in aspeed_clk_probe()
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Dclk-gemini.c314 gemini_clk_data->hws[GEMINI_CLK_RTC] = hw; in gemini_clk_probe()
323 gemini_clk_data->hws[GEMINI_CLK_CPU] = hw; in gemini_clk_probe()
343 gemini_clk_data->hws[GEMINI_CLK_GATES + i] = in gemini_clk_probe()
364 gemini_clk_data->hws[GEMINI_CLK_TVC] = hw; in gemini_clk_probe()
368 gemini_clk_data->hws[GEMINI_CLK_PCI] = hw; in gemini_clk_probe()
372 gemini_clk_data->hws[GEMINI_CLK_UART] = hw; in gemini_clk_probe()
402 gemini_clk_data = kzalloc(struct_size(gemini_clk_data, hws, in gemini_cc_init()
413 gemini_clk_data->hws[i] = ERR_PTR(-EPROBE_DEFER); in gemini_cc_init()
453 gemini_clk_data->hws[GEMINI_CLK_AHB] = hw; in gemini_cc_init()
457 gemini_clk_data->hws[GEMINI_CLK_APB] = hw; in gemini_cc_init()
/Linux-v5.4/drivers/gpu/drm/i915/selftests/
Digt_spinner.c23 spin->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in igt_spinner_init()
24 if (IS_ERR(spin->hws)) { in igt_spinner_init()
25 err = PTR_ERR(spin->hws); in igt_spinner_init()
35 i915_gem_object_set_cache_coherency(spin->hws, I915_CACHE_LLC); in igt_spinner_init()
36 vaddr = i915_gem_object_pin_map(spin->hws, I915_MAP_WB); in igt_spinner_init()
54 i915_gem_object_unpin_map(spin->hws); in igt_spinner_init()
58 i915_gem_object_put(spin->hws); in igt_spinner_init()
68 static u64 hws_address(const struct i915_vma *hws, in hws_address() argument
71 return hws->node.start + seqno_offset(rq->fence.context); in hws_address()
97 struct i915_vma *hws, *vma; in igt_spinner_create_request() local
[all …]
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce/
Ddce_hwseq.c32 hws->ctx
34 hws->regs->reg
38 hws->shifts->field_name, hws->masks->field_name
40 void dce_enable_fe_clock(struct dce_hwseq *hws, in dce_enable_fe_clock() argument
53 struct dce_hwseq *hws = dc->hwseq; in dce_pipe_control_lock() local
75 if (hws->masks->BLND_BLND_V_UPDATE_LOCK != 0) in dce_pipe_control_lock()
80 if (hws->wa.blnd_crtc_trigger) { in dce_pipe_control_lock()
88 void dce_set_blender_mode(struct dce_hwseq *hws, in dce_set_blender_mode() argument
120 if (hws->masks->BLND_ALPHA_MODE != 0) { in dce_set_blender_mode()
129 static void dce_disable_sram_shut_down(struct dce_hwseq *hws) in dce_disable_sram_shut_down() argument
[all …]
/Linux-v5.4/drivers/isdn/hardware/mISDN/
Diohelper.h25 #define IOFUNC_IO(name, hws, ap) \ argument
27 struct hws *hw = p; \
31 struct hws *hw = p; \
35 struct hws *hw = p; \
39 struct hws *hw = p; \
43 #define IOFUNC_IND(name, hws, ap) \ argument
45 struct hws *hw = p; \
50 struct hws *hw = p; \
55 struct hws *hw = p; \
60 struct hws *hw = p; \
[all …]
/Linux-v5.4/drivers/clk/x86/
Dclk-st.c30 static struct clk_hw *hws[ST_MAX_CLKS]; variable
40 hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0, in st_clk_probe()
42 hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz", NULL, 0, in st_clk_probe()
45 hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux", in st_clk_probe()
49 clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_48M]->clk); in st_clk_probe()
51 hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1", "oscout1_mux", in st_clk_probe()
55 devm_clk_hw_register_clkdev(&pdev->dev, hws[ST_CLK_GATE], "oscout1", in st_clk_probe()
66 clk_hw_unregister(hws[i]); in st_clk_remove()
/Linux-v5.4/drivers/ide/
Dide-legacy.c6 static void ide_legacy_init_one(struct ide_hw **hws, struct ide_hw *hw, in ide_legacy_init_one() argument
40 hws[port_no] = hw; in ide_legacy_init_one()
45 struct ide_hw hw[2], *hws[] = { NULL, NULL }; in ide_legacy_device_add() local
50 ide_legacy_init_one(hws, &hw[0], 0, d, config); in ide_legacy_device_add()
51 ide_legacy_init_one(hws, &hw[1], 1, d, config); in ide_legacy_device_add()
53 if (hws[0] == NULL && hws[1] == NULL && in ide_legacy_device_add()
57 return ide_host_add(d, hws, 2, NULL); in ide_legacy_device_add()
/Linux-v5.4/drivers/clk/imgtec/
Dclk-boston.c74 onecell->hws[BOSTON_CLK_INPUT] = hw; in clk_boston_setup()
81 onecell->hws[BOSTON_CLK_SYS] = hw; in clk_boston_setup()
88 onecell->hws[BOSTON_CLK_CPU] = hw; in clk_boston_setup()
99 clk_hw_unregister_fixed_rate(onecell->hws[BOSTON_CLK_CPU]); in clk_boston_setup()
101 clk_hw_unregister_fixed_rate(onecell->hws[BOSTON_CLK_SYS]); in clk_boston_setup()
103 clk_hw_unregister_fixed_rate(onecell->hws[BOSTON_CLK_INPUT]); in clk_boston_setup()
/Linux-v5.4/drivers/crypto/chelsio/chtls/
Dchtls_hw.c141 struct chtls_hws *hws; in get_new_keyid() local
146 hws = &csk->tlshws; in get_new_keyid()
153 hws->rxkey = keyid; in get_new_keyid()
155 hws->txkey = keyid; in get_new_keyid()
169 struct chtls_hws *hws; in free_tls_keyid() local
176 hws = &csk->tlshws; in free_tls_keyid()
179 if (hws->rxkey >= 0) { in free_tls_keyid()
180 __clear_bit(hws->rxkey, cdev->kmap.addr); in free_tls_keyid()
182 hws->rxkey = -1; in free_tls_keyid()
184 if (hws->txkey >= 0) { in free_tls_keyid()
[all …]
Dchtls_io.c224 struct chtls_hws *hws; in tls_copy_ivs() local
231 hws = &csk->tlshws; in tls_copy_ivs()
252 hws->ivsize = number_of_ivs * CIPHER_BLOCK_SIZE; in tls_copy_ivs()
268 hws->ivsize = 0; in tls_copy_ivs()
282 struct chtls_hws *hws; in tls_copy_tx_key() local
287 hws = &csk->tlshws; in tls_copy_tx_key()
291 kaddr = keyid_to_addr(cdev->kmap.start, hws->txkey); in tls_copy_tx_key()
300 ULPTX_LEN16_V(hws->keylen >> 4)); in tls_copy_tx_key()
305 static u64 tlstx_incr_seqnum(struct chtls_hws *hws) in tlstx_incr_seqnum() argument
307 return hws->tx_seq_no++; in tlstx_incr_seqnum()
[all …]
/Linux-v5.4/drivers/gpu/drm/sun4i/
Dsun8i_tcon_top.c141 clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, CLK_NUM), in sun8i_tcon_top_bind()
194 clk_data->hws[CLK_TCON_TOP_TV0] = in sun8i_tcon_top_bind()
200 clk_data->hws[CLK_TCON_TOP_TV1] = in sun8i_tcon_top_bind()
206 clk_data->hws[CLK_TCON_TOP_DSI] = in sun8i_tcon_top_bind()
212 if (IS_ERR(clk_data->hws[i])) { in sun8i_tcon_top_bind()
213 ret = PTR_ERR(clk_data->hws[i]); in sun8i_tcon_top_bind()
230 if (!IS_ERR_OR_NULL(clk_data->hws[i])) in sun8i_tcon_top_bind()
231 clk_hw_unregister_gate(clk_data->hws[i]); in sun8i_tcon_top_bind()
248 if (clk_data->hws[i]) in sun8i_tcon_top_unbind()
249 clk_hw_unregister_gate(clk_data->hws[i]); in sun8i_tcon_top_unbind()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_hw_sequencer.c41 hws->ctx
43 hws->regs->reg
47 hws->shifts->field_name, hws->masks->field_name
197 struct dce_hwseq *hws, in dce120_update_dchub() argument
253 bool dce121_xgmi_enabled(struct dce_hwseq *hws) in dce121_xgmi_enabled() argument
/Linux-v5.4/drivers/clk/samsung/
Dclk-exynos-audss.c108 if (!IS_ERR(clk_data->hws[i])) in exynos_audss_clk_teardown()
109 clk_hw_unregister_mux(clk_data->hws[i]); in exynos_audss_clk_teardown()
113 if (!IS_ERR(clk_data->hws[i])) in exynos_audss_clk_teardown()
114 clk_hw_unregister_divider(clk_data->hws[i]); in exynos_audss_clk_teardown()
118 if (!IS_ERR(clk_data->hws[i])) in exynos_audss_clk_teardown()
119 clk_hw_unregister_gate(clk_data->hws[i]); in exynos_audss_clk_teardown()
148 struct_size(clk_data, hws, in exynos_audss_clk_probe()
155 clk_table = clk_data->hws; in exynos_audss_clk_probe()
/Linux-v5.4/drivers/clk/bcm/
Dclk-bcm2835-aux.c36 struct_size(onecell, hws, in bcm2835_aux_clk_probe()
44 onecell->hws[BCM2835_AUX_CLOCK_UART] = in bcm2835_aux_clk_probe()
47 onecell->hws[BCM2835_AUX_CLOCK_SPI1] = in bcm2835_aux_clk_probe()
50 onecell->hws[BCM2835_AUX_CLOCK_SPI2] = in bcm2835_aux_clk_probe()
/Linux-v5.4/drivers/clk/berlin/
Dbg2q.c285 struct clk_hw **hws; in berlin2q_clock_setup() local
288 clk_data = kzalloc(struct_size(clk_data, hws, MAX_CLKS), GFP_KERNEL); in berlin2q_clock_setup()
292 hws = clk_data->hws; in berlin2q_clock_setup()
341 hws[CLKID_SYS + n] = berlin2_div_register(&dd->map, gbase, in berlin2q_clock_setup()
350 hws[CLKID_GFX2DAXI + n] = clk_hw_register_gate(NULL, gd->name, in berlin2q_clock_setup()
356 hws[CLKID_CPU] = in berlin2q_clock_setup()
360 hws[CLKID_TWD] = in berlin2q_clock_setup()
365 if (!IS_ERR(hws[n])) in berlin2q_clock_setup()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/inc/
Dhw_sequencer.h135 struct dce_hwseq *hws,
140 struct dce_hwseq *hws,
144 struct dce_hwseq *hws,
287 void (*disable_vga)(struct dce_hwseq *hws);
297 struct dce_hwseq *hws,
301 struct dce_hwseq *hws,
306 struct dce_hwseq *hws,
311 struct dce_hwseq *hws,

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