Searched refs:gfx_table (Results 1 – 12 of 12) sorted by relevance
429 single_dpm_table = &(dpm_table->gfx_table); in arcturus_set_default_dpm_table()540 struct arcturus_single_dpm_table *gfx_table = NULL; in arcturus_populate_umd_state_clk() local544 gfx_table = &(dpm_table->gfx_table); in arcturus_populate_umd_state_clk()547 smu->pstate_sclk = gfx_table->dpm_levels[0].value; in arcturus_populate_umd_state_clk()550 if (gfx_table->count > ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL && in arcturus_populate_umd_state_clk()552 smu->pstate_sclk = gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL].value; in arcturus_populate_umd_state_clk()606 single_dpm_table = &(dpm_table->gfx_table); in arcturus_print_clk_levels()705 single_dpm_table = &(dpm_table->gfx_table); in arcturus_upload_dpm_level()768 single_dpm_table = &(dpm_table->gfx_table); in arcturus_force_clk_levels()1194 soft_level = arcturus_find_highest_dpm_level(&(dpm_table->gfx_table)); in arcturus_force_dpm_limit_value()[all …]
738 single_dpm_table = &(dpm_table->gfx_table); in vega20_set_default_dpm_table()900 struct vega20_single_dpm_table *gfx_table = NULL; in vega20_populate_umd_state_clk() local904 gfx_table = &(dpm_table->gfx_table); in vega20_populate_umd_state_clk()907 smu->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umd_state_clk()910 if (gfx_table->count > VEGA20_UMD_PSTATE_GFXCLK_LEVEL && in vega20_populate_umd_state_clk()912 smu->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value; in vega20_populate_umd_state_clk()968 single_dpm_table = &(dpm_table->gfx_table); in vega20_print_clk_levels()1195 single_dpm_table = &(dpm_table->gfx_table); in vega20_upload_dpm_level()1294 single_dpm_table = &(dpm_table->gfx_table); in vega20_force_clk_levels()1458 single_dpm_table = &(dpm_table->gfx_table); in vega20_get_clock_by_type_with_latency()[all …]
61 struct arcturus_single_dpm_table gfx_table; member
111 struct vega20_single_dpm_table gfx_table; member
594 dpm_context->dpm_tables.gfx_table.min = driver_ppt->FreqTableGfx[0]; in navi10_set_default_dpm_table()595 dpm_context->dpm_tables.gfx_table.max = driver_ppt->FreqTableGfx[NUM_GFXCLK_DPM_LEVELS - 1]; in navi10_set_default_dpm_table()
575 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables()696 struct vega12_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table);1045 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()1128 max_freq = data->dpm_table.gfx_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()1516 soft_level = vega12_find_highest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_highest()1518 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()1519 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()1520 data->dpm_table.gfx_table.dpm_levels[soft_level].value; in vega12_force_dpm_highest()1545 soft_level = vega12_find_lowest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_lowest()1547 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_lowest()[all …]
591 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_gfxclk_dpm_table()657 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_default_dpm_tables()1443 &(data->dpm_table.gfx_table); in vega20_get_sclk_od()1445 &(data->golden_dpm_table.gfx_table); in vega20_get_sclk_od()1462 &(data->golden_dpm_table.gfx_table); in vega20_set_sclk_od()1534 struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table); in vega20_populate_umdpstate_clocks() local1537 hwmgr->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()1540 if (gfx_table->count > VEGA20_UMD_PSTATE_GFXCLK_LEVEL && in vega20_populate_umdpstate_clocks()1542 hwmgr->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value; in vega20_populate_umdpstate_clocks()1802 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega20_upload_dpm_min_level()[all …]
1344 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables()1666 struct vega10_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table); in vega10_populate_all_graphic_levels()3290 struct vega10_single_dpm_table *sclk_table = &(data->dpm_table.gfx_table); in vega10_find_dpm_states_clocks_in_dpm_table()3342 for (count = 0; count < dpm_table->gfx_table.count; count++) in vega10_populate_and_upload_sclk_mclk_dpm_levels()3343 dpm_table->gfx_table.dpm_levels[count].value = odn_clk_table->entries[count].clk; in vega10_populate_and_upload_sclk_mclk_dpm_levels()3426 &(data->dpm_table.gfx_table), in vega10_trim_dpm_states()3496 data->dpm_table.gfx_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()3500 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()3545 data->dpm_table.gfx_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()3549 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()[all …]
148 struct vega10_single_dpm_table gfx_table; member
127 struct vega12_single_dpm_table gfx_table; member
179 struct vega20_single_dpm_table gfx_table; member
93 struct smu_11_0_dpm_table gfx_table; member
