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Searched refs:ext_misc_reg (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/clk/tegra/
Dclk-tegra210.c665 u32 boot_val = readl_relaxed(base + params->ext_misc_reg[misc_num]); in _pll_misc_chk_default()
719 clk_base + pllcx->params->ext_misc_reg[0]); in tegra210_pllcx_set_defaults()
721 clk_base + pllcx->params->ext_misc_reg[1]); in tegra210_pllcx_set_defaults()
723 clk_base + pllcx->params->ext_misc_reg[2]); in tegra210_pllcx_set_defaults()
725 clk_base + pllcx->params->ext_misc_reg[3]); in tegra210_pllcx_set_defaults()
783 val = readl_relaxed(clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
786 writel_relaxed(val, clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
796 clk_base + plla->params->ext_misc_reg[0]); in tegra210_plla_set_defaults()
798 clk_base + plla->params->ext_misc_reg[2]); in tegra210_plla_set_defaults()
836 val = readl_relaxed(clk_base + plld->params->ext_misc_reg[0]); in tegra210_plld_set_defaults()
[all …]
Dclk-tegra124.c266 .ext_misc_reg[0] = 0x4f0,
267 .ext_misc_reg[1] = 0x4f4,
268 .ext_misc_reg[2] = 0x4f8,
288 .ext_misc_reg[0] = 0x504,
289 .ext_misc_reg[1] = 0x508,
290 .ext_misc_reg[2] = 0x50c,
348 .ext_misc_reg[0] = 0x5ac,
349 .ext_misc_reg[1] = 0x5b0,
350 .ext_misc_reg[2] = 0x5b4,
645 .ext_misc_reg[0] = 0x570,
[all …]
Dclk-tegra114.c243 .ext_misc_reg[0] = 0x4f0,
244 .ext_misc_reg[1] = 0x4f4,
245 .ext_misc_reg[2] = 0x4f8,
265 .ext_misc_reg[0] = 0x504,
266 .ext_misc_reg[1] = 0x508,
267 .ext_misc_reg[2] = 0x50c,
Dclk-pll.c2195 pll_writel(PLLCX_MISC1_DEFAULT, pll_params->ext_misc_reg[0], pll); in tegra_clk_register_pllc()
2196 pll_writel(PLLCX_MISC2_DEFAULT, pll_params->ext_misc_reg[1], pll); in tegra_clk_register_pllc()
2197 pll_writel(PLLCX_MISC3_DEFAULT, pll_params->ext_misc_reg[2], pll); in tegra_clk_register_pllc()
2332 pll_writel(PLLSS_CFG_DEFAULT, pll_params->ext_misc_reg[0], pll); in tegra_clk_register_pllss()
2333 pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[1], pll); in tegra_clk_register_pllss()
2334 pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[2], pll); in tegra_clk_register_pllss()
Dclk.h262 u32 ext_misc_reg[MAX_PLL_MISC_REG_COUNT]; member