Searched refs:dppclk_khz (Results 1 – 11 of 11) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| D | dcn20_clk_mgr.c | 108 int dpp_inst, dppclk_khz; in dcn20_update_clocks_update_dpp_dto() local
114 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn20_update_clocks_update_dpp_dto()
116 clk_mgr->dccg, dpp_inst, dppclk_khz, false); in dcn20_update_clocks_update_dpp_dto()
169 bool going_up = clk_mgr->base.clks.dppclk_khz < khz; in request_voltage_and_program_global_dpp_clk()
174 clk_mgr->base.clks.dppclk_khz = khz; in request_voltage_and_program_global_dpp_clk()
178 …pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_PIXELCLK, clk_mgr_base->clks.dppclk_khz / 1… in request_voltage_and_program_global_dpp_clk()
183 …pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_PIXELCLK, clk_mgr_base->clks.dppclk_khz / 1… in request_voltage_and_program_global_dpp_clk()
277 if (new_clocks->dppclk_khz > clk_mgr_base->clks.dppclk_khz) in dcn2_update_clocks()
278 request_voltage_and_program_global_dpp_clk(clk_mgr_base, new_clocks->dppclk_khz); in dcn2_update_clocks()
282 int dpp_inst, dppclk_khz; in dcn2_update_clocks() local
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| D | rv1_clk_mgr.c | 44 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in rv1_determine_dppclk_threshold()
47 bool cur_dpp_div = clk_mgr->base.clks.dispclk_khz > clk_mgr->base.clks.dppclk_khz; in rv1_determine_dppclk_threshold()
92 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in ramp_up_dispclk_with_dpp()
121 clk_mgr->base.clks.dppclk_khz = new_clocks->dppclk_khz; in ramp_up_dispclk_with_dpp()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| D | rn_clk_mgr.c | 94 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in rn_update_clocks()
95 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in rn_update_clocks()
97 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in rn_update_clocks()
111 rn_vbios_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in rn_update_clocks()
115 rn_vbios_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in rn_update_clocks()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_debug.c | 355 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
363 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
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| D | dc.c | 2484 info->dppClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dppclk_khz; in get_clock_requirements_for_state()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/inc/ |
| D | core_types.h | 233 int dppclk_khz; member
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.c | 414 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_log_hw_state()
2295 bool should_divided_by_2 = context->bw_ctx.bw.dcn.clk.dppclk_khz <= in update_dchubp_dpp()
2307 pipe_ctx->plane_res.bw.dppclk_khz, in update_dchubp_dpp()
2310 dc->clk_mgr->clks.dppclk_khz = should_divided_by_2 ? in update_dchubp_dpp()
3287 current_clocks->dppclk_khz = clk_khz; in dcn10_set_clock()
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| D | dcn10_hw_sequencer_debug.c | 478 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_get_clock_states()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/ |
| D | dc.h | 257 int dppclk_khz; member
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 2636 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; in dcn20_calculate_dlg_params()
2682 if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000) in dcn20_calculate_dlg_params()
2683 context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; in dcn20_calculate_dlg_params()
2684 context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = in dcn20_calculate_dlg_params()
2691 context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz; in dcn20_calculate_dlg_params()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dcn_calcs.c | 1147 context->bw_ctx.bw.dcn.clk.dppclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz / in dcn_validate_bandwidth()
1394 dc, DM_PP_CLOCK_TYPE_DPPCLK, clocks->dppclk_khz); in dcn_find_dcfclk_suits_all()
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