Home
last modified time | relevance | path

Searched refs:cycles (Results 1 – 25 of 328) sorted by relevance

12345678910>>...14

/Linux-v5.4/drivers/memory/
Djz4780-nemc.c160 uint32_t smcr, val, cycles; in jz4780_nemc_configure_bank() local
206 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
207 if (cycles > nemc->soc_info->tas_tah_cycles_max) { in jz4780_nemc_configure_bank()
209 val, cycles); in jz4780_nemc_configure_bank()
213 smcr |= cycles << NEMC_SMCR_TAS_SHIFT; in jz4780_nemc_configure_bank()
218 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
219 if (cycles > nemc->soc_info->tas_tah_cycles_max) { in jz4780_nemc_configure_bank()
221 val, cycles); in jz4780_nemc_configure_bank()
225 smcr |= cycles << NEMC_SMCR_TAH_SHIFT; in jz4780_nemc_configure_bank()
230 cycles = jz4780_nemc_ns_to_cycles(nemc, val); in jz4780_nemc_configure_bank()
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/bus/
Dqcom,ebi2.txt34 FIXME: the manual mentions "write precharge cycles" and "precharge cycles".
77 - qcom,xmem-recovery-cycles: recovery cycles is the time the memory continues to
82 - qcom,xmem-write-hold-cycles: write hold cycles, these are extra cycles
86 - qcom,xmem-write-delta-cycles: initial latency for write cycles inserted for
88 - qcom,xmem-read-delta-cycles: initial latency for read cycles inserted for the
90 - qcom,xmem-write-wait-cycles: number of wait cycles for every write access, 0=1
92 - qcom,xmem-read-wait-cycles: number of wait cycles for every read access, 0=1
99 - qcom,xmem-adv-to-oe-recovery-cycles: the number of cycles elapsed before an OE
101 2 means 2 cycles between ADV and OE. Valid values 0, 1, 2 or 3.
102 - qcom,xmem-read-hold-cycles: the length in cycles of the first segment of a
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/mtd/
Dfsmc-nand.txt15 byte 0 TCLR : CLE to RE delay in number of AHB clock cycles, only 4 bits
17 cycles.
19 byte 2 THIZ : number of HCLK clock cycles during which the data bus is
21 Only valid for write transactions. Zero means zero cycles,
22 255 means 255 cycles.
23 byte 3 THOLD : number of HCLK clock cycles to hold the address (and data
25 one cycle, 255 means 256 cycles.
26 byte 4 TWAIT : number of HCLK clock cycles to assert the command to the
28 255 means 256 cycles.
29 byte 5 TSET : number of HCLK clock cycles to assert the address before the
[all …]
/Linux-v5.4/drivers/net/ethernet/mellanox/mlx4/
Den_clock.c44 container_of(tc, struct mlx4_en_dev, cycles); in mlx4_en_read_clock()
141 mdev->cycles.mult = neg_adj ? mult - diff : mult + diff; in mlx4_en_phc_adjfreq()
210 timecounter_init(&mdev->clock, &mdev->cycles, ns); in mlx4_en_phc_settime()
277 memset(&mdev->cycles, 0, sizeof(mdev->cycles)); in mlx4_en_init_timestamp()
278 mdev->cycles.read = mlx4_en_read_clock; in mlx4_en_init_timestamp()
279 mdev->cycles.mask = CLOCKSOURCE_MASK(48); in mlx4_en_init_timestamp()
280 mdev->cycles.shift = freq_to_shift(dev->caps.hca_core_clock); in mlx4_en_init_timestamp()
281 mdev->cycles.mult = in mlx4_en_init_timestamp()
282 clocksource_khz2mult(1000 * dev->caps.hca_core_clock, mdev->cycles.shift); in mlx4_en_init_timestamp()
283 mdev->nominal_c_mult = mdev->cycles.mult; in mlx4_en_init_timestamp()
[all …]
/Linux-v5.4/drivers/net/wireless/ath/
Dhw.c144 u32 cycles, busy, rx, tx; in ath_hw_cycle_counters_update() local
151 cycles = REG_READ(ah, AR_CCCNT); in ath_hw_cycle_counters_update()
166 common->cc_ani.cycles += cycles; in ath_hw_cycle_counters_update()
171 common->cc_survey.cycles += cycles; in ath_hw_cycle_counters_update()
183 listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) / in ath_hw_get_listen_time()
/Linux-v5.4/drivers/net/ethernet/mellanox/mlx5/core/lib/
Dclock.c71 struct mlx5_clock *clock = container_of(cc, struct mlx5_clock, cycles); in read_internal_timer()
91 clock_info->cycles = clock->tc.cycle_last; in mlx5_update_clock_info_page()
92 clock_info->mult = clock->cycles.mult; in mlx5_update_clock_info_page()
152 timecounter_init(&clock->tc, &clock->cycles, ns); in mlx5_ptp_settime()
167 u64 cycles, ns; in mlx5_ptp_gettimex() local
170 cycles = mlx5_read_internal_timer(mdev, sts); in mlx5_ptp_gettimex()
171 ns = timecounter_cyc2time(&clock->tc, cycles); in mlx5_ptp_gettimex()
213 clock->cycles.mult = neg_adj ? clock->nominal_c_mult - diff : in mlx5_ptp_adjfreq()
335 cycles_delta = div64_u64(nsec_delta << clock->cycles.shift, in mlx5_perout_configure()
336 clock->cycles.mult); in mlx5_perout_configure()
[all …]
/Linux-v5.4/drivers/pwm/
Dpwm-berlin.c96 u64 cycles; in berlin_pwm_config() local
98 cycles = clk_get_rate(pwm->clk); in berlin_pwm_config()
99 cycles *= period_ns; in berlin_pwm_config()
100 do_div(cycles, NSEC_PER_SEC); in berlin_pwm_config()
102 if (cycles > BERLIN_PWM_MAX_TCNT) { in berlin_pwm_config()
104 cycles >>= 12; // Prescaled by 4096 in berlin_pwm_config()
106 if (cycles > BERLIN_PWM_MAX_TCNT) in berlin_pwm_config()
110 period = cycles; in berlin_pwm_config()
111 cycles *= duty_ns; in berlin_pwm_config()
112 do_div(cycles, period_ns); in berlin_pwm_config()
[all …]
Dpwm-atmel.c117 unsigned long long cycles = state->period; in atmel_pwm_calculate_cprd_and_pres() local
120 cycles *= clk_get_rate(atmel_pwm->clk); in atmel_pwm_calculate_cprd_and_pres()
121 do_div(cycles, NSEC_PER_SEC); in atmel_pwm_calculate_cprd_and_pres()
123 for (*pres = 0; cycles > atmel_pwm->data->cfg.max_period; cycles >>= 1) in atmel_pwm_calculate_cprd_and_pres()
131 *cprd = cycles; in atmel_pwm_calculate_cprd_and_pres()
139 unsigned long long cycles = state->duty_cycle; in atmel_pwm_calculate_cdty() local
141 cycles *= cprd; in atmel_pwm_calculate_cdty()
142 do_div(cycles, state->period); in atmel_pwm_calculate_cdty()
143 *cdty = cprd - cycles; in atmel_pwm_calculate_cdty()
/Linux-v5.4/arch/xtensa/include/asm/
Ddelay.h40 unsigned long cycles = (usecs * (ccount_freq >> 15)) >> 5; in __udelay() local
43 while (((unsigned long)get_ccount()) - start < cycles) in __udelay()
61 unsigned long cycles = (nsec * (ccount_freq >> 15)) >> 15; in __ndelay() local
62 __delay(cycles); in __ndelay()
/Linux-v5.4/arch/arm/plat-omap/
Dcounter_32k.c51 static cycles_t cycles; variable
59 last_cycles = cycles; in omap_read_persistent_clock64()
60 cycles = sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0; in omap_read_persistent_clock64()
62 nsecs = clocksource_cyc2ns(cycles - last_cycles, in omap_read_persistent_clock64()
/Linux-v5.4/tools/virtio/ringtest/
Dmain.h20 static inline void wait_cycles(unsigned long long cycles) in wait_cycles() argument
25 while (__rdtsc() - t < cycles) {} in wait_cycles()
32 static inline void wait_cycles(unsigned long long cycles) in wait_cycles() argument
34 asm volatile("0: brctg %0,0b" : : "d" (cycles)); in wait_cycles()
42 static inline void wait_cycles(unsigned long long cycles) in wait_cycles() argument
/Linux-v5.4/drivers/net/ethernet/mellanox/mlxsw/
Dspectrum_ptp.c64 struct cyclecounter cycles; member
98 container_of(cc, struct mlxsw_sp_ptp_clock, cycles); in mlxsw_sp1_ptp_read_frc()
116 u64 cycles = (u64) nsec; in mlxsw_sp1_ptp_ns2cycles() local
118 cycles <<= tc->cc->shift; in mlxsw_sp1_ptp_ns2cycles()
119 cycles = div_u64(cycles, tc->cc->mult); in mlxsw_sp1_ptp_ns2cycles()
121 return cycles; in mlxsw_sp1_ptp_ns2cycles()
128 u64 next_sec, next_sec_in_nsec, cycles; in mlxsw_sp1_ptp_phc_settime() local
137 cycles = mlxsw_sp1_ptp_ns2cycles(&clock->tc, next_sec_in_nsec); in mlxsw_sp1_ptp_phc_settime()
140 mlxsw_reg_mtpps_vpin_pack(mtpps_pl, cycles); in mlxsw_sp1_ptp_phc_settime()
173 clock->cycles.mult = neg_adj ? clock->nominal_c_mult - diff : in mlxsw_sp1_ptp_adjfine()
[all …]
/Linux-v5.4/arch/h8300/lib/
Ddelay.c14 void __delay(unsigned long cycles) in __delay() argument
17 "bne 1b":"=r"(cycles):"0"(cycles)); in __delay()
/Linux-v5.4/Documentation/m68k/
Dbuddha-driver.rst147 497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)
152 639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
155 781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)
158 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
161 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
164 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
167 1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)
170 355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
176 781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive.
180 system: Sometimes two more clock cycles are inserted by the
[all …]
/Linux-v5.4/tools/power/cpupower/bench/
Dbenchmark.c113 " for %lius\n", _round + 1, config->cycles, in start_benchmark()
125 for (cycle = 0; cycle < config->cycles; cycle++) { in start_benchmark()
139 performance_time / config->cycles); in start_benchmark()
151 for (cycle = 0; cycle < config->cycles; cycle++) { in start_benchmark()
169 powersave_time / config->cycles); in start_benchmark()
DREADME-BENCH35 will be run X time in a row (cycles):
39 cycles=20
50 25ms load/sleep time repeated 20 times (cycles).
51 50ms load/sleep time repeated 20 times (cycles).
53 100ms load/sleep time repeated 20 times (cycles).
83 But if ondemand always kicks in in the middle of the load sleep cycles, it
116 -n, --cycles=<int> load/sleep cycles to get an average value to compare
/Linux-v5.4/arch/arm64/lib/
Ddelay.c26 void __delay(unsigned long cycles) in __delay() argument
34 while ((get_cycles() - start + timer_evt_period) < cycles) in __delay()
38 while ((get_cycles() - start) < cycles) in __delay()
/Linux-v5.4/arch/m68k/coldfire/
Dsltimers.c104 u32 cycles, scnt; in mcfslt_read_clk() local
108 cycles = mcfslt_cnt; in mcfslt_read_clk()
110 cycles += mcfslt_cycles_per_jiffy; in mcfslt_read_clk()
116 return cycles + ((mcfslt_cycles_per_jiffy - 1) - scnt); in mcfslt_read_clk()
/Linux-v5.4/sound/firewire/
Damdtp-stream-trace.h17 …TP_PROTO(const struct amdtp_stream *s, u32 cycles, const __be32 *cip_header, unsigned int payload_…
18 TP_ARGS(s, cycles, cip_header, payload_length, data_blocks, data_block_counter, index),
34 __entry->second = cycles / CYCLES_PER_SECOND;
35 __entry->cycle = cycles % CYCLES_PER_SECOND;
/Linux-v5.4/kernel/locking/
Dtest-ww_mutex.c277 struct test_cycle *cycles; in __test_cycle() local
281 cycles = kmalloc_array(nthreads, sizeof(*cycles), GFP_KERNEL); in __test_cycle()
282 if (!cycles) in __test_cycle()
286 struct test_cycle *cycle = &cycles[n]; in __test_cycle()
290 cycle->b_mutex = &cycles[0].a_mutex; in __test_cycle()
292 cycle->b_mutex = &cycles[n + 1].a_mutex; in __test_cycle()
295 cycle->a_signal = &cycles[last].b_signal; in __test_cycle()
297 cycle->a_signal = &cycles[n - 1].b_signal; in __test_cycle()
305 queue_work(wq, &cycles[n].work); in __test_cycle()
311 struct test_cycle *cycle = &cycles[n]; in __test_cycle()
[all …]
/Linux-v5.4/lib/vdso/
Dgettimeofday.c35 u64 vdso_calc_delta(u64 cycles, u64 last, u64 mask, u32 mult) in vdso_calc_delta() argument
37 return ((cycles - last) & mask) * mult; in vdso_calc_delta()
45 u64 cycles, last, sec, ns; in do_hres() local
50 cycles = __arch_get_hw_counter(vd->clock_mode); in do_hres()
53 if (unlikely((s64)cycles < 0)) in do_hres()
56 ns += vdso_calc_delta(cycles, last, vd->mask, vd->mult); in do_hres()
/Linux-v5.4/tools/perf/util/
Dparse-events.l316 cpu-cycles|cycles { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_CPU_CYCLES); }
317 stalled-cycles-frontend|idle-cycles-frontend { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT…
318 stalled-cycles-backend|idle-cycles-backend { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_H…
324 bus-cycles { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_BUS_CYCLES); }
325 ref-cycles { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_REF_CPU_CYCLES); }
344 cycles-ct { return str(yyscanner, PE_KERNEL_PMU_EVENT); }
345 cycles-t { return str(yyscanner, PE_KERNEL_PMU_EVENT); }
/Linux-v5.4/drivers/clocksource/
Dtimer-prima2.c76 u64 cycles; in sirfsoc_timer_read() local
81 cycles = readl_relaxed(sirfsoc_timer_base + SIRFSOC_TIMER_LATCHED_HI); in sirfsoc_timer_read()
82 cycles = (cycles << 32) | in sirfsoc_timer_read()
85 return cycles; in sirfsoc_timer_read()
/Linux-v5.4/arch/arm/mach-omap2/
Dvc.c433 u32 cycles; in omap4_calc_volt_ramp() local
438 cycles = voltdm->sys_clk.rate / 1000 * time / 1000; in omap4_calc_volt_ramp()
440 cycles /= 64; in omap4_calc_volt_ramp()
446 if (cycles > 63) { in omap4_calc_volt_ramp()
447 cycles /= 4; in omap4_calc_volt_ramp()
452 if (cycles > 63) { in omap4_calc_volt_ramp()
453 cycles /= 2; in omap4_calc_volt_ramp()
458 if (cycles > 63) { in omap4_calc_volt_ramp()
459 cycles /= 4; in omap4_calc_volt_ramp()
464 if (cycles > 63) { in omap4_calc_volt_ramp()
[all …]
/Linux-v5.4/Documentation/misc-devices/
Disl29003.rst54 0: 2^16 cycles (default)
55 1: 2^12 cycles
56 2: 2^8 cycles
57 3: 2^4 cycles

12345678910>>...14