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Searched refs:base_reg (Results 1 – 25 of 44) sorted by relevance

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/Linux-v5.4/drivers/misc/habanalabs/goya/
Dgoya_coresight.c233 u64 base_reg; in goya_config_stm() local
241 base_reg = debug_stm_regs[params->reg_idx] - CFG_BASE; in goya_config_stm()
243 WREG32(base_reg + 0xFB0, CORESIGHT_UNLOCK); in goya_config_stm()
251 WREG32(base_reg + 0xE80, 0x80004); in goya_config_stm()
252 WREG32(base_reg + 0xD64, 7); in goya_config_stm()
253 WREG32(base_reg + 0xD60, 0); in goya_config_stm()
254 WREG32(base_reg + 0xD00, lower_32_bits(input->he_mask)); in goya_config_stm()
255 WREG32(base_reg + 0xD20, lower_32_bits(input->sp_mask)); in goya_config_stm()
256 WREG32(base_reg + 0xD60, 1); in goya_config_stm()
257 WREG32(base_reg + 0xD00, upper_32_bits(input->he_mask)); in goya_config_stm()
[all …]
/Linux-v5.4/arch/sparc/include/asm/
Dwinmacro.h38 #define LOAD_PT_INS(base_reg) \ argument
39 ldd [%base_reg + STACKFRAME_SZ + PT_I0], %i0; \
40 ldd [%base_reg + STACKFRAME_SZ + PT_I2], %i2; \
41 ldd [%base_reg + STACKFRAME_SZ + PT_I4], %i4; \
42 ldd [%base_reg + STACKFRAME_SZ + PT_I6], %i6;
44 #define LOAD_PT_GLOBALS(base_reg) \ argument
45 ld [%base_reg + STACKFRAME_SZ + PT_G1], %g1; \
46 ldd [%base_reg + STACKFRAME_SZ + PT_G2], %g2; \
47 ldd [%base_reg + STACKFRAME_SZ + PT_G4], %g4; \
48 ldd [%base_reg + STACKFRAME_SZ + PT_G6], %g6;
[all …]
/Linux-v5.4/drivers/base/regmap/
Dregcache-rbtree.c27 unsigned int base_reg; member
44 *base = rbnode->base_reg; in regcache_rbtree_get_base_top_reg()
45 *top = rbnode->base_reg + ((rbnode->blklen - 1) * map->reg_stride); in regcache_rbtree_get_base_top_reg()
68 unsigned int base_reg, top_reg; in regcache_rbtree_lookup() local
72 regcache_rbtree_get_base_top_reg(map, rbnode, &base_reg, in regcache_rbtree_lookup()
74 if (reg >= base_reg && reg <= top_reg) in regcache_rbtree_lookup()
81 regcache_rbtree_get_base_top_reg(map, rbnode, &base_reg, in regcache_rbtree_lookup()
83 if (reg >= base_reg && reg <= top_reg) { in regcache_rbtree_lookup()
88 } else if (reg < base_reg) { in regcache_rbtree_lookup()
102 unsigned int base_reg; in regcache_rbtree_insert() local
[all …]
Dregmap-debugfs.c141 c->base_reg = i; in regmap_debugfs_get_dump_start()
171 return c->base_reg + (reg_offset * map->reg_stride); in regmap_debugfs_get_dump_start()
206 if (reg < c->base_reg) { in regmap_next_readable_reg()
207 ret = c->base_reg; in regmap_next_readable_reg()
398 c->base_reg, c->max_reg); in regmap_reg_ranges_read_file()
/Linux-v5.4/arch/arm/mach-omap1/
Dirq.c59 unsigned long base_reg; member
117 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f },
118 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
119 { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 },
125 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff },
126 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed },
129 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3faefc3 },
130 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0x65b3c061 },
137 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f },
138 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd },
[all …]
/Linux-v5.4/arch/nds32/kernel/
Dtraps.c100 static void __dump(struct task_struct *tsk, unsigned long *base_reg) in __dump() argument
106 while (!kstack_end(base_reg)) { in __dump()
107 ret_addr = *base_reg++; in __dump()
117 while (!kstack_end((void *)base_reg) && in __dump()
118 !((unsigned long)base_reg & 0x3) && in __dump()
119 ((unsigned long)base_reg >= TASK_SIZE)) { in __dump()
121 ret_addr = base_reg[LP_OFFSET]; in __dump()
122 next_fp = base_reg[FP_OFFSET]; in __dump()
131 base_reg = (unsigned long *)next_fp; in __dump()
139 unsigned long *base_reg; in show_stack() local
[all …]
/Linux-v5.4/sound/soc/codecs/
Darizona.h133 #define ARIZONA_MUX_ENUMS(name, base_reg) \ argument
134 static ARIZONA_MUX_ENUM_DECL(name##_enum, base_reg); \
137 #define ARIZONA_MIXER_ENUMS(name, base_reg) \ argument
138 ARIZONA_MUX_ENUMS(name##_in1, base_reg); \
139 ARIZONA_MUX_ENUMS(name##_in2, base_reg + 2); \
140 ARIZONA_MUX_ENUMS(name##_in3, base_reg + 4); \
141 ARIZONA_MUX_ENUMS(name##_in4, base_reg + 6)
143 #define ARIZONA_DSP_AUX_ENUMS(name, base_reg) \ argument
144 ARIZONA_MUX_ENUMS(name##_aux1, base_reg); \
145 ARIZONA_MUX_ENUMS(name##_aux2, base_reg + 8); \
[all …]
Dmadera.h213 #define MADERA_MUX_ENUMS(name, base_reg) \ argument
214 static MADERA_MUX_ENUM_DECL(name##_enum, base_reg); \
217 #define MADERA_MIXER_ENUMS(name, base_reg) \ argument
218 MADERA_MUX_ENUMS(name##_in1, base_reg); \
219 MADERA_MUX_ENUMS(name##_in2, base_reg + 2); \
220 MADERA_MUX_ENUMS(name##_in3, base_reg + 4); \
221 MADERA_MUX_ENUMS(name##_in4, base_reg + 6)
223 #define MADERA_DSP_AUX_ENUMS(name, base_reg) \ argument
224 MADERA_MUX_ENUMS(name##_aux1, base_reg); \
225 MADERA_MUX_ENUMS(name##_aux2, base_reg + 8); \
[all …]
Dwm2200.c1087 #define WM2200_MIXER_ENUMS(name, base_reg) \ argument
1088 static WM2200_MUX_ENUM_DECL(name##_in1_enum, base_reg); \
1089 static WM2200_MUX_ENUM_DECL(name##_in2_enum, base_reg + 2); \
1090 static WM2200_MUX_ENUM_DECL(name##_in3_enum, base_reg + 4); \
1091 static WM2200_MUX_ENUM_DECL(name##_in4_enum, base_reg + 6); \
1097 #define WM2200_DSP_ENUMS(name, base_reg) \ argument
1098 static WM2200_MUX_ENUM_DECL(name##_aux1_enum, base_reg); \
1099 static WM2200_MUX_ENUM_DECL(name##_aux2_enum, base_reg + 1); \
1100 static WM2200_MUX_ENUM_DECL(name##_aux3_enum, base_reg + 2); \
1101 static WM2200_MUX_ENUM_DECL(name##_aux4_enum, base_reg + 3); \
[all …]
/Linux-v5.4/drivers/watchdog/
Drdc321x_wdt.c51 int base_reg; member
67 rdc321x_wdt_device.base_reg, &val); in rdc321x_wdt_trigger()
70 rdc321x_wdt_device.base_reg, val); in rdc321x_wdt_trigger()
99 rdc321x_wdt_device.base_reg, RDC_CLS_TMR); in rdc321x_wdt_start()
103 rdc321x_wdt_device.base_reg, in rdc321x_wdt_start()
159 rdc321x_wdt_device.base_reg, &value); in rdc321x_wdt_ioctl()
232 rdc321x_wdt_device.base_reg = r->start; in rdc321x_wdt_probe()
244 rdc321x_wdt_device.base_reg, RDC_WDT_RST); in rdc321x_wdt_probe()
/Linux-v5.4/drivers/gpu/drm/sun4i/
Dsun8i_csc.c159 u32 base_reg; in sun8i_csc_set_coefficients() local
173 base_reg = SUN8I_CSC_COEFF(base, 0); in sun8i_csc_set_coefficients()
174 regmap_bulk_write(map, base_reg, table, 12); in sun8i_csc_set_coefficients()
183 u32 base_reg; in sun8i_de3_ccsc_set_coefficients() local
197 base_reg = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0, 0); in sun8i_de3_ccsc_set_coefficients()
198 regmap_bulk_write(map, base_reg, table, 12); in sun8i_de3_ccsc_set_coefficients()
/Linux-v5.4/arch/mips/kernel/
Dmips-cm.c159 u32 base_reg; in __mips_cm_l2sync_phys_base() local
165 base_reg = read_gcr_l2_only_sync_base(); in __mips_cm_l2sync_phys_base()
166 if (base_reg & CM_GCR_L2_ONLY_SYNC_BASE_SYNCEN) in __mips_cm_l2sync_phys_base()
167 return base_reg & CM_GCR_L2_ONLY_SYNC_BASE_SYNCBASE; in __mips_cm_l2sync_phys_base()
203 u32 base_reg; in mips_cm_probe() local
223 base_reg = read_gcr_base(); in mips_cm_probe()
224 if ((base_reg & CM_GCR_BASE_GCRBASE) != addr) { in mips_cm_probe()
/Linux-v5.4/drivers/media/dvb-frontends/
Ddibx000_common.c82 while (((status = dibx000_read_word(mst, mst->base_reg + 2)) & 0x0100) == 0 && --i > 0) in dibx000_is_i2c_done()
105 dibx000_read_word(mst, mst->base_reg + 2); in dibx000_master_i2c_write()
112 dibx000_write_word(mst, mst->base_reg, data); in dibx000_master_i2c_write()
129 dibx000_write_word(mst, mst->base_reg+1, da); in dibx000_master_i2c_write()
161 dibx000_write_word(mst, mst->base_reg+1, da); in dibx000_master_i2c_read()
169 da = dibx000_read_word(mst, mst->base_reg); in dibx000_master_i2c_read()
188 return dibx000_write_word(mst, mst->base_reg + 3, (u16)(60000 / speed)); in dibx000_i2c_set_speed()
204 return dibx000_write_word(mst, mst->base_reg + 4, intf); in dibx000_i2c_select_interface()
277 tx[0] = (((mst->base_reg + 1) >> 8) & 0xff); in dibx000_i2c_gate_ctrl()
278 tx[1] = ((mst->base_reg + 1) & 0xff); in dibx000_i2c_gate_ctrl()
[all …]
Ddibx000_common.h31 u16 base_reg; member
/Linux-v5.4/sound/soc/cirrus/
Dep93xx-i2s.c109 unsigned base_reg; in ep93xx_i2s_enable() local
124 base_reg = EP93XX_I2S_TX0EN; in ep93xx_i2s_enable()
126 base_reg = EP93XX_I2S_RX0EN; in ep93xx_i2s_enable()
127 ep93xx_i2s_write_reg(info, base_reg, 1); in ep93xx_i2s_enable()
139 unsigned base_reg; in ep93xx_i2s_disable() local
148 base_reg = EP93XX_I2S_TX0EN; in ep93xx_i2s_disable()
150 base_reg = EP93XX_I2S_RX0EN; in ep93xx_i2s_disable()
151 ep93xx_i2s_write_reg(info, base_reg, 0); in ep93xx_i2s_disable()
/Linux-v5.4/drivers/net/dsa/mv88e6xxx/
Dglobal2_scratch.c51 int base_reg, unsigned int offset, in mv88e6xxx_g2_scratch_get_bit() argument
54 int reg = base_reg + (offset / 8); in mv88e6xxx_g2_scratch_get_bit()
77 int base_reg, unsigned int offset, in mv88e6xxx_g2_scratch_set_bit() argument
80 int reg = base_reg + (offset / 8); in mv88e6xxx_g2_scratch_set_bit()
/Linux-v5.4/drivers/bus/
Duniphier-system-bus.c118 void __iomem *base_reg = priv->membase + UNIPHIER_SBC_BASE; in uniphier_system_bus_check_boot_swap() local
121 is_swapped = !(readl(base_reg) & UNIPHIER_SBC_BASE_BE); in uniphier_system_bus_check_boot_swap()
136 void __iomem *base_reg = priv->membase + UNIPHIER_SBC_BASE; in uniphier_system_bus_set_reg() local
171 writel(val, base_reg + UNIPHIER_SBC_STRIDE * i); in uniphier_system_bus_set_reg()
/Linux-v5.4/drivers/input/keyboard/
Dtm2-touchkey.c39 u8 base_reg; member
59 .base_reg = 0x00,
66 .base_reg = 0x00,
100 touchkey->variant->base_reg, data); in tm2_touchkey_led_brightness_set()
/Linux-v5.4/drivers/clk/tegra/
Dclk-tegra124.c170 .base_reg = PLLX_BASE,
204 .base_reg = PLLC_BASE,
258 .base_reg = PLLC2_BASE,
280 .base_reg = PLLC3_BASE,
339 .base_reg = PLLC4_BASE,
402 .base_reg = PLLM_BASE,
459 .base_reg = PLLE_BASE,
498 .base_reg = PLLRE_BASE,
535 .base_reg = PLLP_BASE,
564 .base_reg = PLLA_BASE,
[all …]
Dclk-tegra210.c708 if (readl_relaxed(clk_base + pllcx->params->base_reg) & PLL_ENABLE) { in tegra210_pllcx_set_defaults()
757 u32 val = readl_relaxed(clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
794 writel_relaxed(val, clk_base + plla->params->base_reg); in tegra210_plla_set_defaults()
813 if (readl_relaxed(clk_base + plld->params->base_reg) & in tegra210_plld_set_defaults()
863 u32 val = readl_relaxed(clk_base + plldss->params->base_reg); in plldss_defaults()
914 plldss->params->base_reg); in plldss_defaults()
929 writel_relaxed(val, clk_base + plldss->params->base_reg); in plldss_defaults()
982 u32 val = readl_relaxed(clk_base + pllre->params->base_reg); in tegra210_pllre_set_defaults()
1026 writel_relaxed(val, clk_base + pllre->params->base_reg); in tegra210_pllre_set_defaults()
1111 if (readl_relaxed(clk_base + pllx->params->base_reg) & PLL_ENABLE) { in tegra210_pllx_set_defaults()
[all …]
Dclk-tegra114.c184 .base_reg = PLLC_BASE,
235 .base_reg = PLLC2_BASE,
257 .base_reg = PLLC3_BASE,
306 .base_reg = PLLM_BASE,
346 .base_reg = PLLP_BASE,
376 .base_reg = PLLA_BASE,
412 .base_reg = PLLD_BASE,
430 .base_reg = PLLD2_BASE,
472 .base_reg = PLLU_BASE,
501 .base_reg = PLLX_BASE,
[all …]
Dclk-tegra20.c284 .base_reg = PLLC_BASE,
300 .base_reg = PLLM_BASE,
316 .base_reg = PLLP_BASE,
334 .base_reg = PLLA_BASE,
350 .base_reg = PLLD_BASE,
372 .base_reg = PLLU_BASE,
389 .base_reg = PLLX_BASE,
405 .base_reg = PLLE_BASE,
Dclk-tegra30.c358 .base_reg = PLLC_BASE,
387 .base_reg = PLLM_BASE,
408 .base_reg = PLLP_BASE,
426 .base_reg = PLLA_BASE,
443 .base_reg = PLLD_BASE,
460 .base_reg = PLLD2_BASE,
477 .base_reg = PLLU_BASE,
495 .base_reg = PLLX_BASE,
512 .base_reg = PLLE_BASE,
/Linux-v5.4/drivers/mtd/spi-nor/
Daspeed-smc.c650 u32 reg, base_reg; in aspeed_smc_chip_setup_init() local
680 base_reg = reg & CONTROL_KEEP_MASK; in aspeed_smc_chip_setup_init()
681 if (base_reg != reg) { in aspeed_smc_chip_setup_init()
684 base_reg); in aspeed_smc_chip_setup_init()
686 chip->ctl_val[smc_base] = base_reg; in aspeed_smc_chip_setup_init()
/Linux-v5.4/sound/soc/meson/
Daxg-spdifin.c146 unsigned int base_reg, in axg_spdifin_write_mode_param() argument
154 reg = offset * regmap_get_reg_stride(map) + base_reg; in axg_spdifin_write_mode_param()

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