Searched refs:aenq (Results 1 – 9 of 9) sorted by relevance
214 struct efa_com_aenq *aenq = &edev->aenq; in efa_com_admin_init_aenq() local223 size = EFA_ASYNC_QUEUE_DEPTH * sizeof(*aenq->entries); in efa_com_admin_init_aenq()224 aenq->entries = dma_alloc_coherent(edev->dmadev, size, &aenq->dma_addr, in efa_com_admin_init_aenq()226 if (!aenq->entries) in efa_com_admin_init_aenq()229 aenq->aenq_handlers = aenq_handlers; in efa_com_admin_init_aenq()230 aenq->depth = EFA_ASYNC_QUEUE_DEPTH; in efa_com_admin_init_aenq()231 aenq->cc = 0; in efa_com_admin_init_aenq()232 aenq->phase = 1; in efa_com_admin_init_aenq()234 addr_low = EFA_DMA_ADDR_TO_UINT32_LOW(aenq->dma_addr); in efa_com_admin_init_aenq()235 addr_high = EFA_DMA_ADDR_TO_UINT32_HIGH(aenq->dma_addr); in efa_com_admin_init_aenq()[all …]
603 get_resp.u.aenq.supported_groups, in efa_com_set_aenq_config()604 get_resp.u.aenq.enabled_groups); in efa_com_set_aenq_config()606 if ((get_resp.u.aenq.supported_groups & groups) != groups) { in efa_com_set_aenq_config()610 groups, get_resp.u.aenq.supported_groups); in efa_com_set_aenq_config()614 cmd.u.aenq.enabled_groups = groups; in efa_com_set_aenq_config()
660 struct efa_admin_feature_aenq_desc aenq; member681 struct efa_admin_feature_aenq_desc aenq; member
104 struct efa_com_aenq aenq; member
457 edev->aenq.msix_vector_idx = dev->admin_msix_vector_idx; in efa_probe_device()
153 struct ena_com_aenq *aenq = &dev->aenq; in ena_com_admin_init_aenq() local157 dev->aenq.q_depth = ENA_ASYNC_QUEUE_DEPTH; in ena_com_admin_init_aenq()159 aenq->entries = dma_alloc_coherent(dev->dmadev, size, &aenq->dma_addr, in ena_com_admin_init_aenq()162 if (!aenq->entries) { in ena_com_admin_init_aenq()167 aenq->head = aenq->q_depth; in ena_com_admin_init_aenq()168 aenq->phase = 1; in ena_com_admin_init_aenq()170 addr_low = ENA_DMA_ADDR_TO_UINT32_LOW(aenq->dma_addr); in ena_com_admin_init_aenq()171 addr_high = ENA_DMA_ADDR_TO_UINT32_HIGH(aenq->dma_addr); in ena_com_admin_init_aenq()177 aenq_caps |= dev->aenq.q_depth & ENA_REGS_AENQ_CAPS_AENQ_DEPTH_MASK; in ena_com_admin_init_aenq()188 aenq->aenq_handlers = aenq_handlers; in ena_com_admin_init_aenq()[all …]
320 struct ena_com_aenq aenq; member357 struct ena_admin_feature_aenq_desc aenq; member
908 struct ena_admin_feature_aenq_desc aenq; member943 struct ena_admin_feature_aenq_desc aenq; member
2664 aenq_groups &= get_feat_ctx->aenq.supported_groups; in ena_device_init()
