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Searched refs:_div (Results 1 – 21 of 21) sorted by relevance

/Linux-v5.4/drivers/clk/actions/
Dowl-composite.h38 _mux, _gate, _div, _flags) \ argument
42 .rate.div_hw = _div, \
53 _gate, _div, _flags) \ argument
56 .rate.div_hw = _div, \
82 _gate, _mul, _div, _flags) \ argument
86 .rate.fix_fact_hw.div = _div, \
Dowl-fixed-factor.h16 #define OWL_FIX_FACT(_struct, _name, _parent, _mul, _div, _flags) \ argument
19 .div = _div, \
/Linux-v5.4/drivers/clk/renesas/
Drcar-gen3-cpg.h47 #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ argument
48 DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div)
54 #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \ argument
55 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
Drenesas-cpg-mssr.h51 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ argument
52 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
55 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ argument
56 DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
Dr9a06g032-clocks.c72 #define D_ROOT(_idx, _n, _mul, _div) \ argument
74 .div = _div, .mul = _mul }
75 #define D_FFC(_idx, _n, _src, _div) \ argument
78 .div = _div, .mul = 1}
/Linux-v5.4/drivers/clk/qcom/
Dclk-rpmh.c74 _res_en_offset, _res_on, _div) \ argument
80 .div = _div, \
99 .div = _div, \
115 _res_on, _div) \ argument
117 CLK_RPMH_ARC_EN_OFFSET, _res_on, _div)
120 _div) \ argument
122 CLK_RPMH_VRM_EN_OFFSET, 1, _div)
/Linux-v5.4/drivers/staging/comedi/drivers/
Ddt2811.c315 unsigned int _div; in dt2811_ns_to_timer() local
322 for (_div = 0; _div <= 7; _div++) { in dt2811_ns_to_timer()
324 unsigned int div = dt2811_clk_dividers[_div]; in dt2811_ns_to_timer()
327 unsigned int divisor = DT2811_TMRCTR_MANTISSA(_div) | in dt2811_ns_to_timer()
/Linux-v5.4/include/linux/
Dclk-provider.h981 _div, _mult, _flags) \ argument
983 .div = _div, \
992 _div, _mult, _flags) \ argument
994 .div = _div, \
1007 _div, _mult, _flags) \ argument
1009 .div = _div, \
1018 _div, _mult, _flags) \ argument
1020 .div = _div, \
/Linux-v5.4/drivers/clk/pistachio/
Dclk.h86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
89 .div = _div, \
/Linux-v5.4/drivers/clk/uniphier/
Dclk-uniphier.h83 #define UNIPHIER_CLK_FACTOR(_name, _idx, _parent, _mult, _div) \ argument
91 .div = (_div), \
/Linux-v5.4/drivers/clk/zte/
Dclk.h80 #define FFACTOR(_id, _name, _parent, _mult, _div, _flag) \ argument
83 .div = _div, \
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mtk.h47 #define FACTOR(_id, _name, _parent, _mult, _div) { \ argument
52 .div = _div, \
/Linux-v5.4/drivers/clk/nxp/
Dclk-lpc32xx.c1206 #define LPC32XX_DEFINE_COMPOSITE(_idx, _mux, _div, _gate) \ argument
1213 .div = (CLK_PREFIX(_div) == LPC32XX_CLK__NULL ? NULL : \
1214 &clk_hw_proto[CLK_PREFIX(_div)].hw0), \
/Linux-v5.4/drivers/clk/
Dclk-stm32mp1.c1106 #define FIXED_FACTOR(_id, _name, _parent, _flags, _mult, _div)\ argument
1114 .div = _div,\
1270 #define COMPOSITE(_id, _name, _parents, _flags, _gate, _mux, _div)\ argument
1280 _div,\
Dclk-stm32f4.c704 #define to_pll_div_clk(_div) container_of(_div, struct stm32f4_pll_div, div) argument
/Linux-v5.4/drivers/clk/meson/
Daxg-audio.c149 AUD_DIV(_name##_div, _reg, 0, 16, _flag, \
171 AUD_GATE(_name, _reg, 31, aud_##_name##_div, \
/Linux-v5.4/drivers/hwmon/
Dasb100.c394 static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
Dvt1211.c1011 SENSOR_ATTR_2(fan##ix##_div, S_IRUGO | S_IWUSR, \
Dw83781d.c929 &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
Dw83627hf.c1325 &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
/Linux-v5.4/Documentation/hwmon/
Dsysfs-interface.rst273 `fan[1-*]_div`