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Searched refs:WREG32_SOC15_RLC (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dgfxhub_v1_0.c74 WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BASE, 0); in gfxhub_v1_0_init_system_aperture_regs()
75 WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v1_0_init_system_aperture_regs()
76 WREG32_SOC15_RLC(GC, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v1_0_init_system_aperture_regs()
79 WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v1_0_init_system_aperture_regs()
89 WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v1_0_init_system_aperture_regs()
93 WREG32_SOC15_RLC(GC, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v1_0_init_system_aperture_regs()
132 WREG32_SOC15_RLC(GC, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v1_0_init_tlb_regs()
149 WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL, tmp); in gfxhub_v1_0_init_cache_regs()
154 WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL2, tmp); in gfxhub_v1_0_init_cache_regs()
166 WREG32_SOC15_RLC(GC, 0, mmVM_L2_CNTL3, tmp); in gfxhub_v1_0_init_cache_regs()
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Dgfx_v9_0.c2470 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, sh_mem_config); in gfx_v9_0_init_compute_vmid()
2471 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, sh_mem_bases); in gfx_v9_0_init_compute_vmid()
2528 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, tmp); in gfx_v9_0_constants_init()
2529 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, 0); in gfx_v9_0_constants_init()
2535 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_CONFIG, tmp); in gfx_v9_0_constants_init()
2540 WREG32_SOC15_RLC(GC, 0, mmSH_MEM_BASES, tmp); in gfx_v9_0_constants_init()
3078 WREG32_SOC15_RLC(GC, 0, mmCP_ME_CNTL, tmp); in gfx_v9_0_cp_gfx_enable()
3276 WREG32_SOC15_RLC(GC, 0, mmCP_MEC_CNTL, 0); in gfx_v9_0_cp_compute_enable()
3278 WREG32_SOC15_RLC(GC, 0, mmCP_MEC_CNTL, in gfx_v9_0_cp_compute_enable()
3339 WREG32_SOC15_RLC(GC, 0, mmRLC_CP_SCHEDULERS, tmp); in gfx_v9_0_kiq_setting()
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Dsoc15_common.h115 #define WREG32_SOC15_RLC(ip, inst, reg, value) \ macro