Searched refs:UVH_GR1_TLB_INT1_CONFIG (Results 1 – 3 of 3) sorted by relevance
362 #define UVH_GR1_TLB_INT1_CONFIG 0x61f40UL macro
330 core * (UVH_GR1_TLB_INT1_CONFIG - UVH_GR1_TLB_INT0_CONFIG); in gru_chiplet_cpu_to_mmr()
1307 #define UVH_GR1_TLB_INT1_CONFIG ( \ macro