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Searched refs:SMC_RESP_0 (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/radeon/
Dtrinity_smc.c36 if (RREG32(SMC_RESP_0) != 0) in trinity_notify_message_to_smu()
40 v = RREG32(SMC_RESP_0); in trinity_notify_message_to_smu()
Dkv_smc.c37 if ((RREG32(SMC_RESP_0) & SMC_RESP_MASK) != 0) in kv_notify_message_to_smu()
41 tmp = RREG32(SMC_RESP_0) & SMC_RESP_MASK; in kv_notify_message_to_smu()
Dsi_smc.c183 tmp = RREG32(SMC_RESP_0); in si_send_msg_to_smc()
188 tmp = RREG32(SMC_RESP_0); in si_send_msg_to_smc()
Dtrinityd.h170 #define SMC_RESP_0 0x230 macro
Dsid.h58 #define SMC_RESP_0 0x230 macro
Dcikd.h430 #define SMC_RESP_0 0x254 macro
Dci_dpm.c1668 tmp = RREG32(SMC_RESP_0); in ci_send_msg_to_smc()
1673 tmp = RREG32(SMC_RESP_0); in ci_send_msg_to_smc()
1945 if (RREG32(SMC_RESP_0) == 1)
Dsi_dpm.c3622 if (RREG32(SMC_RESP_0) == 1)
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Dsmu7_smumgr.c170 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in smu7_send_msg_to_smc()
172 ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); in smu7_send_msg_to_smc()
182 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in smu7_send_msg_to_smc()
184 ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); in smu7_send_msg_to_smc()
203 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in smu7_send_msg_to_smc_with_parameter()
223 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in smu7_send_msg_to_smc_offset()
225 if (1 != PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP)) in smu7_send_msg_to_smc_offset()
Dci_smumgr.c215 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in ci_send_msg_to_smc()
217 ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP); in ci_send_msg_to_smc()
Dfiji_smumgr.c142 PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0); in fiji_start_smu_in_protection_mode()
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dsi_smc.c176 tmp = RREG32(SMC_RESP_0); in amdgpu_si_send_msg_to_smc()
182 return (PPSMC_Result)RREG32(SMC_RESP_0); in amdgpu_si_send_msg_to_smc()
Dsid.h60 #define SMC_RESP_0 0x8C macro
Dsi_dpm.c4082 if (RREG32(SMC_RESP_0) == 1)