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Searched refs:SCLK_OTGPHY0 (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Drk3036-cru.h32 #define SCLK_OTGPHY0 93 macro
Drk3188-cru-common.h37 #define SCLK_OTGPHY0 81 macro
Drk3128-cru.h56 #define SCLK_OTGPHY0 142 macro
Drk3228-cru.h65 #define SCLK_OTGPHY0 142 macro
Drk3288-cru.h48 #define SCLK_OTGPHY0 93 macro
Drk3368-cru.h44 #define SCLK_OTGPHY0 93 macro
/Linux-v5.4/drivers/clk/rockchip/
Dclk-rk3036.c327 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin12m", CLK_IGNORE_UNUSED,
Dclk-rk3128.c390 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin12m", 0,
Dclk-rk3228.c462 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin24m", 0,
Dclk-rk3188.c347 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin24m", CLK_IGNORE_UNUSED,
Dclk-rk3368.c563 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin24m", CLK_IGNORE_UNUSED,
Dclk-rk3288.c554 GATE(SCLK_OTGPHY0, "sclk_otgphy0", "xin24m", CLK_IGNORE_UNUSED,
/Linux-v5.4/arch/arm/boot/dts/
Drk3066a.dtsi285 clocks = <&cru SCLK_OTGPHY0>;
Drk3188.dtsi229 clocks = <&cru SCLK_OTGPHY0>;
Drk322x.dtsi219 clocks = <&cru SCLK_OTGPHY0>;
Drk3288.dtsi908 clocks = <&cru SCLK_OTGPHY0>;