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Searched refs:RING_CTL (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/i915/gt/
Dintel_hangcheck.c120 tmp = ENGINE_READ(engine, RING_CTL); in engine_stuck()
124 ENGINE_WRITE(engine, RING_CTL, tmp); in engine_stuck()
Dintel_ringbuffer.c633 ENGINE_WRITE(engine, RING_CTL, 0); in stop_ring()
655 ENGINE_READ(engine, RING_CTL), in xcs_resume()
664 ENGINE_READ(engine, RING_CTL), in xcs_resume()
701 ENGINE_WRITE(engine, RING_CTL, RING_CTL_SIZE(ring->size) | RING_VALID); in xcs_resume()
705 RING_CTL(engine->mmio_base), in xcs_resume()
711 ENGINE_READ(engine, RING_CTL), in xcs_resume()
712 ENGINE_READ(engine, RING_CTL) & RING_VALID, in xcs_resume()
773 intel_uncore_write_fw(uncore, RING_CTL(base), 0); in reset_prepare()
Dintel_engine_cs.c1212 ENGINE_READ(engine, RING_CTL), in intel_engine_print_registers()
1213 ENGINE_READ(engine, RING_CTL) & (RING_WAIT | RING_WAIT_SEMAPHORE) ? " [waiting]" : ""); in intel_engine_print_registers()
Dintel_lrc.c835 regs[CTX_RING_BUFFER_CONTROL] = i915_mmio_reg_offset(RING_CTL(base)); in virtual_update_register_offsets()
3211 CTX_REG(regs, CTX_RING_BUFFER_CONTROL, RING_CTL(base), in execlists_init_reg_state()
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_pmu.c188 val = ENGINE_READ_FW(engine, RING_CTL); in engines_sample()
Di915_gem.c1172 intel_uncore_write(uncore, RING_CTL(base), 0); in init_unused_ring()
Di915_gpu_error.c1103 ee->ctl = ENGINE_READ(engine, RING_CTL); in error_record_engine_registers()
Di915_reg.h2405 #define RING_CTL(base) _MMIO((base) + 0x3c) macro
/Linux-v5.4/drivers/gpu/drm/i915/gvt/
Dhandlers.c1901 MMIO_RING_DFH(RING_CTL, D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()