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Searched refs:PCIE_CNTL2__SLV_MEM_LS_EN_MASK (Results 1 – 14 of 14) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dnbio_v2_3.c220 data |= (PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in nbio_v2_3_update_medium_grain_light_sleep()
224 data &= ~(PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in nbio_v2_3_update_medium_grain_light_sleep()
245 if (data & PCIE_CNTL2__SLV_MEM_LS_EN_MASK) in nbio_v2_3_get_clockgating_state()
Dnbio_v6_1.c180 data |= (PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in nbio_v6_1_update_medium_grain_light_sleep()
184 data &= ~(PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in nbio_v6_1_update_medium_grain_light_sleep()
205 if (data & PCIE_CNTL2__SLV_MEM_LS_EN_MASK) in nbio_v6_1_get_clockgating_state()
Dnbio_v7_0.c203 data |= (PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in nbio_v7_0_update_medium_grain_light_sleep()
207 data &= ~(PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in nbio_v7_0_update_medium_grain_light_sleep()
228 if (data & PCIE_CNTL2__SLV_MEM_LS_EN_MASK) in nbio_v7_0_get_clockgating_state()
Dnbio_v7_4.c204 data |= (PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in nbio_v7_4_update_medium_grain_light_sleep()
208 data &= ~(PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in nbio_v7_4_update_medium_grain_light_sleep()
229 if (data & PCIE_CNTL2__SLV_MEM_LS_EN_MASK) in nbio_v7_4_get_clockgating_state()
Dvi.c1365 data |= PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in vi_update_bif_medium_grain_light_sleep()
1369 data &= ~(PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in vi_update_bif_medium_grain_light_sleep()
1626 if (data & PCIE_CNTL2__SLV_MEM_LS_EN_MASK) in vi_common_get_clockgating_state()
Dcik.c1690 data |= PCIE_CNTL2__SLV_MEM_LS_EN_MASK | in cik_program_aspm()
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_3_0_sh_mask.h6646 #define PCIE_CNTL2__SLV_MEM_LS_EN_MASK 0x00010000L macro
Dbif_4_1_sh_mask.h2057 #define PCIE_CNTL2__SLV_MEM_LS_EN_MASK 0x10000 macro
Dbif_5_0_sh_mask.h2629 #define PCIE_CNTL2__SLV_MEM_LS_EN_MASK 0x10000 macro
Dbif_5_1_sh_mask.h3013 #define PCIE_CNTL2__SLV_MEM_LS_EN_MASK 0x10000 macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_4_sh_mask.h43498 #define PCIE_CNTL2__SLV_MEM_LS_EN_MASK … macro
Dnbio_2_3_sh_mask.h54853 #define PCIE_CNTL2__SLV_MEM_LS_EN_MASK … macro
Dnbio_7_0_sh_mask.h74167 #define PCIE_CNTL2__SLV_MEM_LS_EN_MASK … macro
Dnbio_6_1_sh_mask.h38794 #define PCIE_CNTL2__SLV_MEM_LS_EN_MASK … macro