Home
last modified time | relevance | path

Searched refs:OD8_SETTING_GFXCLK_FREQ3 (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/
Dvega20_ppt.h146 OD8_SETTING_GFXCLK_FREQ3, enumerator
Dvega20_ppt.c1108 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].feature_id && in vega20_print_clk_levels()
1151 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].feature_id && in vega20_print_clk_levels()
1168 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].min_value, in vega20_print_clk_levels()
1169 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].max_value); in vega20_print_clk_levels()
1556 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].feature_id = in vega20_set_default_od8_setttings()
1568 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].default_value = in vega20_set_default_od8_setttings()
2469 case OD8_SETTING_GFXCLK_FREQ3: in vega20_update_specified_od8_value()
2725 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].feature_id && in vega20_odn_edit_dpm_table()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega20_hwmgr.c1129 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].feature_id = in vega20_od8_set_feature_id()
1142 od_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].feature_id = in vega20_od8_set_feature_id()
1249 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].default_value = in vega20_od8_initialize_default_settings()
1288 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].default_value = in vega20_od8_initialize_default_settings()
1401 case OD8_SETTING_GFXCLK_FREQ3: in vega20_od8_set_settings()
3009 od8_settings[OD8_SETTING_GFXCLK_FREQ3].feature_id && in vega20_odn_edit_dpm_table()
3410 od8_settings[OD8_SETTING_GFXCLK_FREQ3].feature_id && in vega20_print_clock_levels()
3446 od8_settings[OD8_SETTING_GFXCLK_FREQ3].feature_id && in vega20_print_clock_levels()
3463 od8_settings[OD8_SETTING_GFXCLK_FREQ3].min_value, in vega20_print_clock_levels()
3464 od8_settings[OD8_SETTING_GFXCLK_FREQ3].max_value); in vega20_print_clock_levels()
Dvega20_hwmgr.h410 OD8_SETTING_GFXCLK_FREQ3, enumerator