Searched refs:MG_MISC_SUS0_SUSCLK_DYNCLKGATE_MODE_MASK (Results 1 – 2 of 2) sorted by relevance
3046 val &= ~(MG_MISC_SUS0_SUSCLK_DYNCLKGATE_MODE_MASK | in icl_disable_phy_clock_gating()
2151 #define MG_MISC_SUS0_SUSCLK_DYNCLKGATE_MODE_MASK (3 << 14) macro