IP2_31_28 (reference) in projects: Linux-v5.4

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Searched refs:IP2_31_28 (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/pinctrl/sh-pfc/
D	pfc-r8a77970.c	`105 #define GPSR2_0 F_(VI0_CLK, IP2_31_28) 176 #define IP2_31_28 FM(VI0_CLK) FM(MSIOF2_SCK) FM(SCK3) F_(0, 0) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0… macro 266 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 475 PINMUX_IPSR_GPSR(IP2_31_28, VI0_CLK), 476 PINMUX_IPSR_GPSR(IP2_31_28, MSIOF2_SCK), 477 PINMUX_IPSR_GPSR(IP2_31_28, SCK3), 478 PINMUX_IPSR_GPSR(IP2_31_28, HSCK3), 2285 IP2_31_28`
D	pfc-r8a77980.c	`119 #define GPSR2_0 F_(VI0_CLK, IP2_31_28) 209 #define IP2_31_28 FM(VI0_CLK) FM(MSIOF2_SCK) FM(SCK3) F_(0, 0) FM(HSCK3) F_(0, 0) F_(0, 0) F_(0… macro 317 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 559 PINMUX_IPSR_GPSR(IP2_31_28, VI0_CLK), 560 PINMUX_IPSR_GPSR(IP2_31_28, MSIOF2_SCK), 561 PINMUX_IPSR_GPSR(IP2_31_28, SCK3), 562 PINMUX_IPSR_GPSR(IP2_31_28, HSCK3), 2707 IP2_31_28`
D	pfc-r8a77990.c	110 #define GPSR1_0 F_(A0, IP2_31_28) 237 #define IP2_31_28 FM(A0) FM(IRQ0) FM(PWM2_A) FM(MSIOF3_SS1_B) FM(VI5_CLK_A) FM(DU_CDE) FM(HRX3… macro 393 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 650 PINMUX_IPSR_GPSR(IP2_31_28, A0), 651 PINMUX_IPSR_GPSR(IP2_31_28, IRQ0), 652 PINMUX_IPSR_MSEL(IP2_31_28, PWM2_A, SEL_PWM2_0), 653 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF3_SS1_B, SEL_MSIOF3_1), 654 PINMUX_IPSR_MSEL(IP2_31_28, VI5_CLK_A, SEL_VIN5_0), 655 PINMUX_IPSR_GPSR(IP2_31_28, DU_CDE), 656 PINMUX_IPSR_MSEL(IP2_31_28, HRX3_D, SEL_HSCIF3_3), [all …]
D	pfc-r8a77995.c	`61 #define GPSR1_16 F_(DU_DR0, IP2_31_28) 222 #define IP2_31_28 FM(DU_DR0) FM(LCDOUT16) FM(RX4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0… macro 356 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 614 PINMUX_IPSR_GPSR(IP2_31_28, DU_DR0), 615 PINMUX_IPSR_GPSR(IP2_31_28, LCDOUT16), 616 PINMUX_IPSR_MSEL(IP2_31_28, RX4_B, SEL_SCIF4_1), 2642 IP2_31_28`
D	pfc-r8a7795-es1.c	119 #define GPSR1_8 F_(A8, IP2_31_28) 279 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 443 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 789 PINMUX_IPSR_GPSR(IP2_31_28, A8), 790 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 791 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 792 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 793 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 794 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 795 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
D	pfc-r8a7796.c	124 #define GPSR1_8 F_(A8, IP2_31_28) 282 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 457 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 799 PINMUX_IPSR_GPSR(IP2_31_28, A8), 800 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 801 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 802 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 803 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 804 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 805 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
D	pfc-r8a77965.c	125 #define GPSR1_8 F_(A8, IP2_31_28) 283 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 458 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 802 PINMUX_IPSR_GPSR(IP2_31_28, A8), 803 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 804 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 805 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 806 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 807 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 808 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
D	pfc-r8a7795.c	120 #define GPSR1_8 F_(A8, IP2_31_28) 280 #define IP2_31_28 FM(A8) FM(RX3_B) FM(MSIOF2_SYNC_A) FM(HRX4_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(… macro 453 FM(IP0_31_28) IP0_31_28 FM(IP1_31_28) IP1_31_28 FM(IP2_31_28) IP2_31_28 FM(IP3_31_28) IP3_31_28 \ 796 PINMUX_IPSR_GPSR(IP2_31_28, A8), 797 PINMUX_IPSR_MSEL(IP2_31_28, RX3_B, SEL_SCIF3_1), 798 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 799 PINMUX_IPSR_MSEL(IP2_31_28, HRX4_B, SEL_HSCIF4_1), 800 PINMUX_IPSR_MSEL(IP2_31_28, SDA6_A, SEL_I2C6_0), 801 PINMUX_IPSR_MSEL(IP2_31_28, AVB_AVTP_MATCH_B, SEL_ETHERAVB_1), 802 PINMUX_IPSR_MSEL(IP2_31_28, PWM1_B, SEL_PWM1_1), [all …]
D	pfc-r8a77470.c	`633 PINMUX_IPSR_GPSR(IP2_31_28, D13), 634 PINMUX_IPSR_MSEL(IP2_31_28, MSIOF2_SYNC_A, SEL_MSIOF2_0), 635 PINMUX_IPSR_MSEL(IP2_31_28, RX4_C, SEL_SCIF4_2),`