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Searched refs:IMX7ULP_CLK_SPLL_BUS_CLK (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dimx7ulp-clock.h56 #define IMX7ULP_CLK_SPLL_BUS_CLK 43 macro
/Linux-v5.4/arch/arm/boot/dts/
Dimx7ulp.dtsi282 <&scg1 IMX7ULP_CLK_SPLL_BUS_CLK>;
315 <&scg1 IMX7ULP_CLK_SPLL_BUS_CLK>;
/Linux-v5.4/Documentation/devicetree/bindings/clock/
Dimx7ulp-clock.txt88 <&scg1 IMX7ULP_CLK_SPLL_BUS_CLK>;
/Linux-v5.4/drivers/clk/imx/
Dclk-imx7ulp.c115 …clks[IMX7ULP_CLK_SPLL_BUS_CLK] = imx_clk_divider_gate("spll_bus_clk", "spll_sel", CLK_SET_RATE_GAT… in imx7ulp_clk_scg1_init()