Home
last modified time | relevance | path

Searched refs:GENFC_RD__VSYNC_SEL_R__SHIFT (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7146 #define GENFC_RD__VSYNC_SEL_R__SHIFT 0x00000003 macro
Ddce_8_0_sh_mask.h10634 #define GENFC_RD__VSYNC_SEL_R__SHIFT 0x3 macro
Ddce_10_0_sh_mask.h11018 #define GENFC_RD__VSYNC_SEL_R__SHIFT 0x3 macro
Ddce_11_0_sh_mask.h10830 #define GENFC_RD__VSYNC_SEL_R__SHIFT 0x3 macro
Ddce_11_2_sh_mask.h12084 #define GENFC_RD__VSYNC_SEL_R__SHIFT 0x3 macro
Ddce_12_0_sh_mask.h2242 #define GENFC_RD__VSYNC_SEL_R__SHIFT … macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_sh_mask.h881 #define GENFC_RD__VSYNC_SEL_R__SHIFT … macro
Ddcn_2_0_0_sh_mask.h292 #define GENFC_RD__VSYNC_SEL_R__SHIFT … macro