Searched refs:D_BDW (Results 1 – 2 of 2) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/i915/gvt/ |
| D | mmio.h | 42 #define D_BDW (1 << 0) macro 49 #define D_GEN8PLUS (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL) 52 #define D_BDW_PLUS (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL) 54 #define D_PRE_SKL (D_BDW) 55 #define D_ALL (D_BDW | D_SKL | D_KBL | D_BXT | D_CFL)
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| D | handlers.c | 53 return D_BDW; in intel_gvt_get_device_type() 2492 MMIO_DH(FORCEWAKE_ACK_HSW, D_BDW, NULL, NULL); in init_generic_mmio_info() 2524 MMIO_DH(HSW_PWR_WELL_CTL1, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2525 MMIO_DH(HSW_PWR_WELL_CTL2, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2526 MMIO_DH(HSW_PWR_WELL_CTL3, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2527 MMIO_DH(HSW_PWR_WELL_CTL4, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2528 MMIO_DH(HSW_PWR_WELL_CTL5, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2529 MMIO_DH(HSW_PWR_WELL_CTL6, D_BDW, NULL, power_well_ctl_mmio_write); in init_generic_mmio_info() 2798 MMIO_D(WM_MISC, D_BDW); in init_broadwell_mmio_info() 2799 MMIO_D(_MMIO(BDW_EDP_PSR_BASE), D_BDW); in init_broadwell_mmio_info() [all …]
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