Searched refs:DMA_STATUS_REG (Results 1 – 9 of 9) sorted by relevance
870 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in cayman_get_allowed_info_register()871 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in cayman_get_allowed_info_register()1769 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()1774 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in cayman_gpu_check_soft_reset()
1330 #define DMA_STATUS_REG 0xd034 macro
1105 case DMA_STATUS_REG: in evergreen_get_allowed_info_register()3790 RREG32(DMA_STATUS_REG)); in evergreen_print_gpu_status_regs()3793 RREG32(DMA_STATUS_REG + 0x800)); in evergreen_print_gpu_status_regs()3848 tmp = RREG32(DMA_STATUS_REG); in evergreen_gpu_check_soft_reset()
1840 #define DMA_STATUS_REG 0xd034 macro
1322 case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET): in si_get_allowed_info_register()1323 case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET): in si_get_allowed_info_register()3802 tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET); in si_gpu_check_soft_reset()3807 tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET); in si_gpu_check_soft_reset()
181 case DMA_STATUS_REG: in r600_get_allowed_info_register()1584 RREG32(DMA_STATUS_REG)); in r600_print_gpu_status_regs()1647 tmp = RREG32(DMA_STATUS_REG); in r600_gpu_check_soft_reset()
2625 #define DMA_STATUS_REG 0xd034 macro
638 #define DMA_STATUS_REG 0xd034 macro
1904 #define DMA_STATUS_REG 0x340d macro
