Home
last modified time | relevance | path

Searched refs:CS (Results 1 – 25 of 89) sorted by relevance

1234

/Linux-v5.4/Documentation/devicetree/bindings/spi/
Dspi-nxp-fspi.txt14 This encodes to which bus and CS the flash is connected:
15 - <0>: Bus A, CS 0
16 - <1>: Bus A, CS 1
17 - <2>: Bus B, CS 0
18 - <3>: Bus B, CS 1
Dspi-fsl-qspi.txt18 This encodes to which bus and CS the flash is connected:
19 <0>: Bus A, CS 0
20 <1>: Bus A, CS 1
21 <2>: Bus B, CS 0
22 <3>: Bus B, CS 1
Dspi-davinci.txt40 For example to have 3 internal CS and 2 GPIO CS, user could define
42 where first three are internal CS and last two are GPIO CS.
Dspi-samsung.txt53 - no-cs-readback: the CS line is disconnected, therefore the device should not
54 operate based on CS signalling.
/Linux-v5.4/arch/x86/um/os-Linux/
Dmcontext.c18 COPY(EIP); COPY_SEG_CPL3(CS); COPY(EFL); COPY_SEG_CPL3(SS); in get_regs_from_mc()
28 COPY2(CS, CSGSFS); in get_regs_from_mc()
29 regs->gp[CS / sizeof(unsigned long)] &= 0xffff; in get_regs_from_mc()
30 regs->gp[CS / sizeof(unsigned long)] |= 3; in get_regs_from_mc()
/Linux-v5.4/Documentation/devicetree/bindings/memory-controllers/
Dpl353-smc.txt31 ranges = <0x0 0x0 0xe1000000 0x1000000 //Nand CS Region
32 0x1 0x0 0xe2000000 0x2000000 //SRAM/NOR CS Region
33 0x2 0x0 0xe4000000 0x2000000>; //SRAM/NOR CS Region
Domap-gpmc.txt20 - #size-cells: Must be set to 1 to allow CS address passing
31 of the per-CS register GPMC_CONFIG7 (as set up by the
95 - gpmc,cs-extra-delay: CS signal is delayed by half GPMC clock
97 accesses to a different CS
99 accesses to the same CS
Datmel,ebi.txt25 The first cell encodes the CS.
26 The second cell encode the offset into the CS memory
31 - ranges: Encodes CS to memory region association.
/Linux-v5.4/arch/x86/include/uapi/asm/
Dptrace-abi.h20 #define CS 13 macro
56 #define CS 136 macro
/Linux-v5.4/tools/perf/arch/x86/tests/
Dregs_load.S14 #define CS 10 * 8 macro
47 movq $0, CS(%rdi)
84 movl $0, CS(%edi)
/Linux-v5.4/arch/x86/entry/
Dentry_64.S213 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
519 testb $3, CS-ORIG_RAX+8(%rsp)
559 testb $3, CS+8(%rsp)
615 testb $3, CS(%rsp)
627 testb $3, CS(%rsp)
685 testb $3, CS(%rsp)
895 testb $3, CS(%rsp)
991 testb $3, CS-ORIG_RAX(%rsp) /* If coming from userspace, switch stacks */
1000 testb $3, CS-ORIG_RAX(%rsp)
1292 testb $3, CS+8(%rsp)
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/bus/
Dimx-weim.txt21 - #size-cells: Must be set to 1 to allow CS address passing
31 Purpose Register controller that contains WEIM CS GPR
34 values depending on the CS space configuration.
54 child node. We get the CS indexes from the address
Dqcom,ebi2.txt79 the data bus. They are inserted when reading one CS and switching to another
80 CS or read followed by write on the same CS. Valid values 0 thru 15. Minimum
84 WE is asserted until CS is asserted. With a hold of 1 (value = 0), the CS
103 read transfer. For a single read transfer this will be the time from CS
/Linux-v5.4/arch/x86/um/
Dptrace_64.c41 [CS >> 3] = HOST_CS,
93 case CS: in putreg()
172 case CS: in getreg()
Dptrace_32.c68 [CS] = HOST_CS,
108 case CS: in putreg()
154 case CS: in getreg()
Duser-offsets.c46 DEFINE(HOST_CS, CS); in foo()
75 DEFINE_LONGS(HOST_CS, CS); in foo()
/Linux-v5.4/Documentation/devicetree/bindings/display/exynos/
Dsamsung-fimd.txt49 - wr-setup: clock cycles for the active period of CS signal is enabled until
52 - wr-active: clock cycles for the active period of CS is enabled.
54 - wr-hold: clock cycles for the active period of CS is disabled until write
/Linux-v5.4/Documentation/devicetree/bindings/net/
Dmaxim,ds26522.txt5 - reg: SPI CS.
/Linux-v5.4/Documentation/input/devices/
Diforce-protocol.rst40 2B OP LEN DATA CS
43 CS is the checksum. It is equal to the exclusive or of all bytes.
51 The 2B, LEN and CS fields have disappeared, probably because USB handles
234 ff 03 42 03 e8 CS would mean that the device has 1000 bytes of ram available.
245 ff 02 4e 14 CS would stand for 20 effects.
/Linux-v5.4/arch/nds32/math-emu/
Dfpuemu.c56 CS, enumerator
163 ftype = CS;
295 case CS:{
/Linux-v5.4/Documentation/x86/
Dentry_64.rst68 stack, from the CS of the ptregs area of the kernel stack::
71 testl $3,CS+8(%rsp)
95 which might have triggered right after a normal entry wrote CS to the
/Linux-v5.4/Documentation/devicetree/bindings/mtd/
Datmel-nand.txt33 - reg: describes the CS lines assigned to the NAND device. If the NAND device
34 exposes multiple CS lines (multi-dies chips), your reg property will
36 1st entry: the CS line this NAND chip is connected to
43 - cs-gpios: the GPIO(s) used to control the CS line.
Dgpmc-onenand.txt13 - reg: The CS line the peripheral is connected to
/Linux-v5.4/arch/arm/boot/dts/
Dpxa300-raumfeld-common.dtsi334 MFP_PIN_PXA300(34) MFP_AF0 /* CS#0 */
335 MFP_PIN_PXA300(125) MFP_AF0 /* CS#1 */
336 MFP_PIN_PXA300(96) MFP_AF0 /* CS#2 */
/Linux-v5.4/Documentation/devicetree/bindings/iio/resolver/
Dad2s90.txt18 delay is expected between the application of a logic LO to CS and the

1234