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Searched refs:CLK_TOP_MUX_AUD_2 (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/sound/soc/mediatek/mt8183/
Dmt8183-afe-clk.c32 CLK_TOP_MUX_AUD_2, enumerator
71 [CLK_TOP_MUX_AUD_2] = "top_mux_aud_2",
311 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_2]); in apll2_mux_setting()
314 __func__, aud_clks[CLK_TOP_MUX_AUD_2], ret); in apll2_mux_setting()
317 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting()
321 __func__, aud_clks[CLK_TOP_MUX_AUD_2], in apll2_mux_setting()
352 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting()
356 __func__, aud_clks[CLK_TOP_MUX_AUD_2], in apll2_mux_setting()
360 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_2]); in apll2_mux_setting()
371 clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting()
[all …]
/Linux-v5.4/include/dt-bindings/clock/
Dmt6797-clk.h38 #define CLK_TOP_MUX_AUD_2 28 macro
Dmt8183-clk.h56 #define CLK_TOP_MUX_AUD_2 20 macro
/Linux-v5.4/drivers/clk/mediatek/
Dclk-mt6797.c367 MUX_GATE(CLK_TOP_MUX_AUD_2, "aud_2_sel", aud_2_parents,
Dclk-mt8183.c655 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_AUD_2, "aud_2_sel",