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Searched refs:CLKID_VCLK_DIV1 (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.4/include/dt-bindings/clock/
Dg12a-clkc.h113 #define CLKID_VCLK_DIV1 148 macro
Dgxbb-clkc.h134 #define CLKID_VCLK_DIV1 185 macro
/Linux-v5.4/drivers/clk/meson/
Dmeson8b.h115 #define CLKID_VCLK_DIV1 140 macro
Dmeson8b.c2795 [CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
3000 [CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
3216 [CLKID_VCLK_DIV1] = &meson8b_vclk_div1_gate.hw,
Dgxbb.c2863 [CLKID_VCLK_DIV1] = &gxbb_vclk_div1.hw,
3074 [CLKID_VCLK_DIV1] = &gxbb_vclk_div1.hw,
Dg12a.c4089 [CLKID_VCLK_DIV1] = &g12a_vclk_div1.hw,
4309 [CLKID_VCLK_DIV1] = &g12a_vclk_div1.hw,
4558 [CLKID_VCLK_DIV1] = &g12a_vclk_div1.hw,