Home
last modified time | relevance | path

Searched refs:CHL_INT2_MSK (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/scsi/hisi_sas/
Dhisi_sas_v1_hw.c182 #define CHL_INT2_MSK (PORT_BASE + 0x1c4) macro
800 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0x12a); in start_phys_v1_hw()
811 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0x6a); in phys_init_v1_hw()
812 hisi_sas_phy_read32(hisi_hba, i, CHL_INT2_MSK); in phys_init_v1_hw()
1722 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0x8000012a); in interrupt_openall_v1_hw()
Dhisi_sas_v3_hw.c280 #define CHL_INT2_MSK (PORT_BASE + 0x1c8) macro
617 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0xffffbfe); in init_reg_v3_hw()
924 u32 irq_msk = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT2_MSK); in disable_phy_v3_hw()
930 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2_MSK, msk | irq_msk); in disable_phy_v3_hw()
950 hisi_sas_phy_write32(hisi_hba, phy_no, CHL_INT2_MSK, irq_msk); in disable_phy_v3_hw()
1730 u32 irq_msk = hisi_sas_phy_read32(hisi_hba, phy_no, CHL_INT2_MSK); in handle_chl_int2_v3_hw()
2508 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0xffffffff); in interrupt_disable_v3_hw()
2763 HISI_SAS_DEBUGFS_REG(CHL_INT2_MSK),
Dhisi_sas_v2_hw.c247 #define CHL_INT2_MSK (PORT_BASE + 0x1c8) macro
1251 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0x8ffffbfe); in init_reg_v2_hw()
3408 hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0xffffffff); in interrupt_disable_v2_hw()