Searched refs:CE4100_SSCR1_RFT (Results 1 – 2 of 2) sorted by relevance
102 #define CE4100_SSCR1_RFT (0x00000c00) /* Receive FIFO Threshold (mask) */ macro
62 | CE4100_SSCR1_RFT | CE4100_SSCR1_TFT | SSCR1_MWDS \240 mask = CE4100_SSCR1_RFT; in pxa2xx_spi_clear_rx_thre()570 sccr1_reg &= ~CE4100_SSCR1_RFT; in reset_sccr1()1344 chip->threshold = (CE4100_SSCR1_RxTresh(rx_thres) & CE4100_SSCR1_RFT) | in setup()
