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Searched refs:BLC_PWM_CTL (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/gma500/
Dpsb_intel_lvds.c64 ret = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_get_max_backlight()
76 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL); in psb_intel_lvds_get_max_backlight()
146 REG_WRITE(BLC_PWM_CTL, in psb_lvds_pwm_set_brightness()
188 blc_pwm_ctl = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_set_backlight()
190 REG_WRITE(BLC_PWM_CTL, in psb_intel_lvds_set_backlight()
267 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_save()
308 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL); in psb_intel_lvds_restore()
433 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_prepare()
Dcdv_device.c80 u32 max = REG_READ(BLC_PWM_CTL); in cdv_get_max_backlight()
98 u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in cdv_get_brightness()
134 blc_pwm_ctl = REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_set_brightness()
135 REG_WRITE(BLC_PWM_CTL, (blc_pwm_ctl | in cdv_set_brightness()
280 regs->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in cdv_save_display_registers()
353 REG_WRITE(BLC_PWM_CTL, regs->saveBLC_PWM_CTL); in cdv_restore_display_registers()
Dcdv_intel_lvds.c62 retval = ((REG_READ(BLC_PWM_CTL) & in cdv_intel_lvds_get_max_backlight()
132 REG_WRITE(BLC_PWM_CTL,
170 REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_intel_lvds_set_backlight()
171 REG_WRITE(BLC_PWM_CTL, in cdv_intel_lvds_set_backlight()
317 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in cdv_intel_lvds_prepare()
Doaktrail_device.c68 max_pwm_blc = REG_READ(BLC_PWM_CTL) >> 16; in oaktrail_set_brightness()
85 REG_WRITE(BLC_PWM_CTL, (max_pwm_blc << 16) | blc_pwm_ctl); in oaktrail_set_brightness()
126 REG_WRITE(BLC_PWM_CTL, value | (value << 16)); in device_backlight_init()
236 regs->saveBLC_PWM_CTL = PSB_RVDC32(BLC_PWM_CTL); in oaktrail_save_display_registers()
366 PSB_WVDC32(regs->saveBLC_PWM_CTL, BLC_PWM_CTL); in oaktrail_restore_display_registers()
Doaktrail_lvds.c162 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in oaktrail_lvds_prepare()
175 ret = ((REG_READ(BLC_PWM_CTL) & in oaktrail_lvds_get_max_backlight()
Dpsb_device.c86 REG_WRITE(BLC_PWM_CTL, in psb_backlight_setup()
Dpsb_intel_reg.h80 #define BLC_PWM_CTL 0x61254 macro
/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_panel.c556 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in i9xx_get_backlight()
646 tmp = I915_READ(BLC_PWM_CTL) & ~mask; in i9xx_set_backlight()
647 I915_WRITE(BLC_PWM_CTL, tmp | level); in i9xx_set_backlight()
978 ctl = I915_READ(BLC_PWM_CTL); in i9xx_enable_backlight()
981 I915_WRITE(BLC_PWM_CTL, 0); in i9xx_enable_backlight()
994 I915_WRITE(BLC_PWM_CTL, ctl); in i9xx_enable_backlight()
995 POSTING_READ(BLC_PWM_CTL); in i9xx_enable_backlight()
1030 I915_WRITE(BLC_PWM_CTL, ctl); in i965_enable_backlight()
1661 ctl = I915_READ(BLC_PWM_CTL); in i9xx_setup_backlight()
1704 ctl = I915_READ(BLC_PWM_CTL); in i965_setup_backlight()
/Linux-v5.4/drivers/gpu/drm/i915/
Di915_reg.h4842 #define BLC_PWM_CTL _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61254) macro