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Searched refs:AZALIA_CRC0_CONTROL0__CRC_SOURCE_SEL_MASK (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_sh_mask.h12129 #define AZALIA_CRC0_CONTROL0__CRC_SOURCE_SEL_MASK 0x1000 macro
Ddce_10_0_sh_mask.h13387 #define AZALIA_CRC0_CONTROL0__CRC_SOURCE_SEL_MASK 0x1000 macro
Ddce_11_0_sh_mask.h13393 #define AZALIA_CRC0_CONTROL0__CRC_SOURCE_SEL_MASK 0x1000 macro
Ddce_11_2_sh_mask.h14009 #define AZALIA_CRC0_CONTROL0__CRC_SOURCE_SEL_MASK 0x1000 macro
Ddce_12_0_sh_mask.h6982 #define AZALIA_CRC0_CONTROL0__CRC_SOURCE_SEL_MASK macro
/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_sh_mask.h7522 #define AZALIA_CRC0_CONTROL0__CRC_SOURCE_SEL_MASK macro
Ddcn_1_0_sh_mask.h8117 #define AZALIA_CRC0_CONTROL0__CRC_SOURCE_SEL_MASK macro
Ddcn_2_0_0_sh_mask.h7790 #define AZALIA_CRC0_CONTROL0__CRC_SOURCE_SEL_MASK macro