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Searched refs:umc_inst (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dumc_v8_7.c44 uint32_t umc_inst, in get_umc_8_reg_offset() argument
47 return adev->umc.channel_offs*ch_inst + UMC_8_INST_DIST*umc_inst; in get_umc_8_reg_offset()
90 uint32_t umc_inst = 0; in umc_v8_7_clear_error_count() local
94 LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { in umc_v8_7_clear_error_count()
96 umc_inst, in umc_v8_7_clear_error_count()
176 uint32_t umc_inst = 0; in umc_v8_7_query_ras_error_count() local
180 LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { in umc_v8_7_query_ras_error_count()
182 umc_inst, in umc_v8_7_query_ras_error_count()
200 uint32_t umc_inst) in umc_v8_7_query_error_address() argument
205 …uint32_t channel_index = adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst… in umc_v8_7_query_error_address()
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Dumc_v6_7.c47 uint32_t umc_inst, in get_umc_v6_7_reg_offset() argument
50 return adev->umc.channel_offs * ch_inst + UMC_V6_7_INST_DIST * umc_inst; in get_umc_v6_7_reg_offset()
162 uint32_t umc_inst = 0; in umc_v6_7_reset_error_count() local
166 LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { in umc_v6_7_reset_error_count()
168 umc_inst, in umc_v6_7_reset_error_count()
181 uint32_t umc_inst = 0; in umc_v6_7_query_ras_error_count() local
187 LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { in umc_v6_7_query_ras_error_count()
189 umc_inst, in umc_v6_7_query_ras_error_count()
206 uint32_t umc_inst) in umc_v6_7_query_error_address() argument
232 adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst]; in umc_v6_7_query_error_address()
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Dumc_v6_1.c88 uint32_t umc_inst, in get_umc_6_reg_offset() argument
91 return adev->umc.channel_offs*ch_inst + UMC_6_INST_DIST*umc_inst; in get_umc_6_reg_offset()
147 uint32_t umc_inst = 0; in umc_v6_1_clear_error_count() local
156 LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { in umc_v6_1_clear_error_count()
158 umc_inst, in umc_v6_1_clear_error_count()
259 uint32_t umc_inst = 0; in umc_v6_1_query_ras_error_count() local
272 LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { in umc_v6_1_query_ras_error_count()
274 umc_inst, in umc_v6_1_query_ras_error_count()
299 uint32_t umc_inst) in umc_v6_1_query_error_address() argument
304 …uint32_t channel_index = adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst… in umc_v6_1_query_error_address()
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Damdgpu_umc.h39 #define LOOP_UMC_INST(umc_inst) for ((umc_inst) = 0; (umc_inst) < adev->umc.umc_inst_num; (umc_inst… argument
41 #define LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) LOOP_UMC_INST((umc_inst)) LOOP_UMC_CH_INST((ch_inst… argument