Searched refs:hsync_period (Results 1 – 2 of 2) sorted by relevance
90 u32 hsync_period, vsync_period; in dpu_hw_intf_setup_timing_engine() local102 hsync_period = p->hsync_pulse_width + p->h_back_porch + p->width + in dpu_hw_intf_setup_timing_engine()108 hsync_period) + p->hsync_skew; in dpu_hw_intf_setup_timing_engine()109 display_v_end = ((vsync_period - p->v_front_porch) * hsync_period) + in dpu_hw_intf_setup_timing_engine()113 hsync_end_x = hsync_period - p->h_front_porch - 1; in dpu_hw_intf_setup_timing_engine()125 active_v_end = active_v_start + (p->yres * hsync_period) - 1; in dpu_hw_intf_setup_timing_engine()141 hsync_ctl = (hsync_period << 16) | p->hsync_pulse_width; in dpu_hw_intf_setup_timing_engine()148 active_v_end = active_v_start + (p->yres * hsync_period) - 1; in dpu_hw_intf_setup_timing_engine()191 DPU_REG_WRITE(c, INTF_VSYNC_PERIOD_F0, vsync_period * hsync_period); in dpu_hw_intf_setup_timing_engine()193 p->vsync_pulse_width * hsync_period); in dpu_hw_intf_setup_timing_engine()
787 u32 hsync_period, vsync_period; in dp_catalog_panel_tpg_enable() local795 hsync_period = drm_mode->htotal; in dp_catalog_panel_tpg_enable()799 hsync_period); in dp_catalog_panel_tpg_enable()802 * hsync_period) - 1; in dp_catalog_panel_tpg_enable()808 hsync_end_x = hsync_period - (drm_mode->hsync_start - in dp_catalog_panel_tpg_enable()813 hsync_ctl = (hsync_period << 16) | in dp_catalog_panel_tpg_enable()821 hsync_period); in dp_catalog_panel_tpg_enable()823 hsync_period); in dp_catalog_panel_tpg_enable()
