| /Linux-v5.15/drivers/crypto/qat/qat_dh895xcc/ |
| D | adf_dh895xcc_hw_data.c | 25 u32 fuses = self->fuses; in get_accel_mask() local
27 return ~fuses >> ADF_DH895XCC_ACCELERATORS_REG_OFFSET & in get_accel_mask()
33 u32 fuses = self->fuses; in get_ae_mask() local
35 return ~fuses & ADF_DH895XCC_ACCELENGINES_MASK; in get_ae_mask()
106 int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK) in get_sku()
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| D | adf_drv.c | 128 &hw_data->fuses); in adf_probe()
|
| /Linux-v5.15/drivers/crypto/qat/qat_c3xxx/ |
| D | adf_c3xxx_hw_data.c | 25 u32 fuses = self->fuses; in get_accel_mask() local
28 accel = ~(fuses | straps) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET; in get_accel_mask()
37 u32 fuses = self->fuses; in get_ae_mask() local
48 return ~(fuses | straps) & ADF_C3XXX_ACCELENGINES_MASK; in get_ae_mask()
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| D | adf_drv.c | 128 &hw_data->fuses); in adf_probe()
|
| /Linux-v5.15/drivers/crypto/qat/qat_c62x/ |
| D | adf_c62x_hw_data.c | 25 u32 fuses = self->fuses; in get_accel_mask() local
28 accel = ~(fuses | straps) >> ADF_C62X_ACCELERATORS_REG_OFFSET; in get_accel_mask()
37 u32 fuses = self->fuses; in get_ae_mask() local
48 return ~(fuses | straps) & ADF_C62X_ACCELENGINES_MASK; in get_ae_mask()
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| D | adf_drv.c | 128 &hw_data->fuses); in adf_probe()
177 i = (hw_data->fuses & ADF_DEVICE_FUSECTL_MASK) ? 1 : 0; in adf_probe()
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| /Linux-v5.15/drivers/soc/qcom/ |
| D | cpr.c | 809 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_populate_ring_osc_idx() local
813 for (; fuse < end; fuse++, fuses++) { in cpr_populate_ring_osc_idx()
814 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->ring_osc, &data); in cpr_populate_ring_osc_idx()
851 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_fuse_corner_init() local
872 for (i = 0; fuse <= end; fuse++, fuses++, i++, fdata++) { in cpr_fuse_corner_init()
882 uV = cpr_read_fuse_uV(desc, fdata, fuses->init_voltage, in cpr_fuse_corner_init()
902 ret = nvmem_cell_read_variable_le_u32(drv->dev, fuses->quotient, &fuse->quot); in cpr_fuse_corner_init()
1079 const struct cpr_fuse *fuses = drv->cpr_fuses; in cpr_corner_init() local
1177 quot_offset = fuses[fnum].quotient_offset; in cpr_corner_init()
1230 struct cpr_fuse *fuses; in cpr_get_fuses() local
[all …]
|
| /Linux-v5.15/drivers/crypto/qat/qat_common/ |
| D | adf_gen2_hw_data.c | 160 u32 fuses = hw_data->fuses; in adf_gen2_get_accel_cap() local
176 if ((straps | fuses) & ADF_POWERGATE_PKE) in adf_gen2_get_accel_cap()
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| D | adf_accel_devices.h | 183 u32 fuses; member
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| /Linux-v5.15/Documentation/devicetree/bindings/phy/ |
| D | nvidia,tegra20-usb-phy.txt | 47 - nvidia,xcvr-setup-use-fuses : boolean, indicates that the value is read
48 from the on-chip fuses
49 If both are provided, nvidia,xcvr-setup-use-fuses takes precedence.
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| /Linux-v5.15/Documentation/devicetree/bindings/cpufreq/ |
| D | imx-cpufreq-dt.txt | 5 "speed grading" value which are written in fuses. These bits are combined with
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| /Linux-v5.15/drivers/crypto/qat/qat_4xxx/ |
| D | adf_4xxx_hw_data.c | 41 u32 me_disable = self->fuses; in get_ae_mask()
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| D | adf_drv.c | 191 pci_read_config_dword(pdev, ADF_4XXX_FUSECTL4_OFFSET, &hw_data->fuses); in adf_probe()
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | tegra30.dtsi | 990 nvidia,xcvr-setup-use-fuses;
1029 nvidia,xcvr-setup-use-fuses;
1067 nvidia,xcvr-setup-use-fuses;
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| D | tegra20-acer-a500-picasso.dts | 727 nvidia,xcvr-setup-use-fuses;
738 nvidia,xcvr-setup-use-fuses;
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| /Linux-v5.15/drivers/nvme/target/ |
| D | passthru.c | 91 id->fuses = 0; in nvmet_passthru_override_id_ctrl()
|
| /Linux-v5.15/Documentation/security/keys/ |
| D | trusted-encrypted.rst | 36 fuses and is accessible to TEE only.
|
| /Linux-v5.15/include/linux/ |
| D | nvme.h | 290 __le16 fuses; member
|
