Searched refs:cntval_bits (Results 1 – 9 of 9) sorted by relevance
225 .cntval_bits = 32,
307 .cntval_bits = 40,
1039 if (!overflow && (val & (1ULL << (x86_pmu.cntval_bits - 1)))) in p4_pmu_handle_irq()1332 .cntval_bits = ARCH_P4_CNTRVAL_BITS,
1803 int shift = 64 - x86_pmu.cntval_bits; in intel_pmu_save_and_restart_reload()
5553 x86_pmu.cntval_bits = eax.split.bit_width; in intel_pmu_init()
600 if (counter & (1ULL << (x86_pmu.cntval_bits - 1))) in amd_pmu_wait_on_overflow()923 .cntval_bits = 48,
110 int shift = 64 - x86_pmu.cntval_bits; in x86_perf_event_update()1696 if (val & (1ULL << (x86_pmu.cntval_bits - 1))) in x86_pmu_handle_irq()2038 pr_info("... bit width: %d\n", x86_pmu.cntval_bits); in x86_pmu_show_pmu_cap()2723 userpg->pmc_width = x86_pmu.cntval_bits; in arch_perf_update_userpage()2986 cap->bit_width_gp = x86_pmu.cntval_bits; in perf_get_x86_pmu_capability()2987 cap->bit_width_fixed = x86_pmu.cntval_bits; in perf_get_x86_pmu_capability()
742 int cntval_bits; member
534 x86_pmu.cntval_bits = eax.split.bit_width; in zhaoxin_pmu_init()