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/Linux-v5.15/arch/arm/mach-pxa/include/mach/
Dhardware.h106 unsigned int _id = (id) & 0xf3f0; \
107 _id == 0x2120; \
112 unsigned int _id = (id) & 0xf3ff; \
113 _id <= 0x2105; \
118 unsigned int _id = (id) & 0xffff; \
119 _id == 0x2d06; \
124 unsigned int _id = (id) & 0xf300; \
125 _id == 0x2100; \
137 unsigned int _id = (id) >> 4 & 0xfff; \
138 _id == 0x411; \
[all …]
/Linux-v5.15/arch/powerpc/include/asm/
Dperf_event_server.h170 #define EVENT_VAR(_id, _suffix) event_attr_##_id##_suffix argument
171 #define EVENT_PTR(_id, _suffix) &EVENT_VAR(_id, _suffix).attr.attr argument
173 #define EVENT_ATTR(_name, _id, _suffix) \ argument
174 PMU_EVENT_ATTR(_name, EVENT_VAR(_id, _suffix), _id, \
177 #define GENERIC_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _g) argument
178 #define GENERIC_EVENT_PTR(_id) EVENT_PTR(_id, _g) argument
180 #define CACHE_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _c) argument
181 #define CACHE_EVENT_PTR(_id) EVENT_PTR(_id, _c) argument
183 #define POWER_EVENT_ATTR(_name, _id) EVENT_ATTR(_name, _id, _p) argument
184 #define POWER_EVENT_PTR(_id) EVENT_PTR(_id, _p) argument
/Linux-v5.15/drivers/clk/renesas/
Drzg2l-cpg.h59 #define DEF_TYPE(_name, _id, _type...) \ argument
60 { .name = _name, .id = _id, .type = _type }
61 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
62 DEF_TYPE(_name, _id, _type, .parent = _parent)
63 #define DEF_SAMPLL(_name, _id, _parent, _conf) \ argument
64 DEF_TYPE(_name, _id, CLK_TYPE_SAM_PLL, .parent = _parent, .conf = _conf)
65 #define DEF_INPUT(_name, _id) \ argument
66 DEF_TYPE(_name, _id, CLK_TYPE_IN)
67 #define DEF_FIXED(_name, _id, _parent, _mult, _div) \ argument
68 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
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Drcar-gen3-cpg.h35 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument
36 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
38 #define DEF_GEN3_MDSEL(_name, _id, _md, _parent0, _div0, _parent1, _div1) \ argument
39 DEF_BASE(_name, _id, CLK_TYPE_GEN3_MDSEL, \
43 #define DEF_GEN3_PE(_name, _id, _parent_sscg, _div_sscg, _parent_clean, \ argument
45 DEF_GEN3_MDSEL(_name, _id, 12, _parent_sscg, _div_sscg, \
48 #define DEF_GEN3_OSC(_name, _id, _parent, _div) \ argument
49 DEF_BASE(_name, _id, CLK_TYPE_GEN3_OSC, _parent, .div = _div)
51 #define DEF_GEN3_RCKSEL(_name, _id, _parent0, _div0, _parent1, _div1) \ argument
52 DEF_BASE(_name, _id, CLK_TYPE_GEN3_RCKSEL, \
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Drenesas-cpg-mssr.h44 #define DEF_TYPE(_name, _id, _type...) \ argument
45 { .name = _name, .id = _id, .type = _type }
46 #define DEF_BASE(_name, _id, _type, _parent...) \ argument
47 DEF_TYPE(_name, _id, _type, .parent = _parent)
49 #define DEF_INPUT(_name, _id) \ argument
50 DEF_TYPE(_name, _id, CLK_TYPE_IN)
51 #define DEF_FIXED(_name, _id, _parent, _div, _mult) \ argument
52 DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument
54 DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
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/Linux-v5.15/drivers/clk/samsung/
Dclk.h42 #define ALIAS(_id, dname, a) \ argument
44 .id = _id, \
67 #define FRATE(_id, cname, pname, f, frate) \ argument
69 .id = _id, \
94 #define FFACTOR(_id, cname, pname, m, d, f) \ argument
96 .id = _id, \
128 #define __MUX(_id, cname, pnames, o, s, w, f, mf) \ argument
130 .id = _id, \
141 #define MUX(_id, cname, pnames, o, s, w) \ argument
142 __MUX(_id, cname, pnames, o, s, w, 0, 0)
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/Linux-v5.15/include/linux/
Dmod_devicetable.h427 #define BCMA_CORE(_manuf, _id, _rev, _class) \ argument
428 { .manuf = _manuf, .id = _id, .rev = _rev, .class = _class, }
602 #define MDIO_ID_ARGS(_id) \ argument
603 ((_id)>>31) & 1, ((_id)>>30) & 1, ((_id)>>29) & 1, ((_id)>>28) & 1, \
604 ((_id)>>27) & 1, ((_id)>>26) & 1, ((_id)>>25) & 1, ((_id)>>24) & 1, \
605 ((_id)>>23) & 1, ((_id)>>22) & 1, ((_id)>>21) & 1, ((_id)>>20) & 1, \
606 ((_id)>>19) & 1, ((_id)>>18) & 1, ((_id)>>17) & 1, ((_id)>>16) & 1, \
607 ((_id)>>15) & 1, ((_id)>>14) & 1, ((_id)>>13) & 1, ((_id)>>12) & 1, \
608 ((_id)>>11) & 1, ((_id)>>10) & 1, ((_id)>>9) & 1, ((_id)>>8) & 1, \
609 ((_id)>>7) & 1, ((_id)>>6) & 1, ((_id)>>5) & 1, ((_id)>>4) & 1, \
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/Linux-v5.15/drivers/clk/pistachio/
Dclk.h19 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
21 .id = _id, \
39 #define MUX(_id, _name, _pnames, _reg, _shift) \ argument
41 .id = _id, \
59 #define DIV(_id, _name, _pname, _reg, _width) \ argument
61 .id = _id, \
69 #define DIV_F(_id, _name, _pname, _reg, _width, _div_flags) \ argument
71 .id = _id, \
86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
88 .id = _id, \
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/Linux-v5.15/drivers/clk/rockchip/
Dclk.h330 #define PLL(_type, _id, _name, _pnames, _flags, _con, _mode, _mshift, \ argument
333 .id = _id, \
462 #define COMPOSITE(_id, cname, pnames, f, mo, ms, mw, mf, ds, dw,\ argument
465 .id = _id, \
483 #define COMPOSITE_DIV_OFFSET(_id, cname, pnames, f, mo, ms, mw, \ argument
486 .id = _id, \
505 #define COMPOSITE_NOMUX(_id, cname, pname, f, mo, ds, dw, df, \ argument
508 .id = _id, \
523 #define COMPOSITE_NOMUX_DIVTBL(_id, cname, pname, f, mo, ds, dw,\ argument
526 .id = _id, \
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/Linux-v5.15/drivers/clk/mediatek/
Dclk-mtk.h30 #define FIXED_CLK(_id, _name, _parent, _rate) { \ argument
31 .id = _id, \
48 #define FACTOR(_id, _name, _parent, _mult, _div) { \ argument
49 .id = _id, \
82 #define MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, _shift, \ argument
84 .id = _id, \
102 #define MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \ argument
104 MUX_GATE_FLAGS_2(_id, _name, _parents, _reg, \
111 #define MUX_GATE(_id, _name, _parents, _reg, _shift, _width, _gate) \ argument
112 MUX_GATE_FLAGS(_id, _name, _parents, _reg, _shift, _width, \
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Dclk-mt8183-ipu_conn.c44 #define GATE_IPU_CONN(_id, _name, _parent, _shift) \ argument
45 GATE_MTK(_id, _name, _parent, &ipu_conn_cg_regs, _shift, \
48 #define GATE_IPU_CONN_APB(_id, _name, _parent, _shift) \ argument
49 GATE_MTK(_id, _name, _parent, &ipu_conn_apb_cg_regs, _shift, \
52 #define GATE_IPU_CONN_AXI_I(_id, _name, _parent, _shift) \ argument
53 GATE_MTK(_id, _name, _parent, &ipu_conn_axi_cg_regs, _shift, \
56 #define GATE_IPU_CONN_AXI1_I(_id, _name, _parent, _shift) \ argument
57 GATE_MTK(_id, _name, _parent, &ipu_conn_axi1_cg_regs, _shift, \
60 #define GATE_IPU_CONN_AXI2_I(_id, _name, _parent, _shift) \ argument
61 GATE_MTK(_id, _name, _parent, &ipu_conn_axi2_cg_regs, _shift, \
Dclk-mux.h40 #define GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ argument
43 .id = _id, \
62 #define MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \ argument
65 GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \
70 #define MUX_GATE_CLR_SET_UPD(_id, _name, _parents, _mux_ofs, \ argument
73 MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, \
78 #define MUX_CLR_SET_UPD(_id, _name, _parents, _mux_ofs, \ argument
81 GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs, \
Dclk-mt8192.c880 #define GATE_APMIXED(_id, _name, _parent, _shift) \ argument
881 GATE_MTK(_id, _name, _parent, &apmixed_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
923 #define GATE_INFRA0(_id, _name, _parent, _shift) \ argument
924 GATE_MTK(_id, _name, _parent, &infra0_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
926 #define GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
927 GATE_MTK_FLAGS(_id, _name, _parent, &infra1_cg_regs, _shift, \
930 #define GATE_INFRA1(_id, _name, _parent, _shift) \ argument
931 GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, 0)
933 #define GATE_INFRA2(_id, _name, _parent, _shift) \ argument
934 GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
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/Linux-v5.15/drivers/regulator/
Dmax77826-regulator.c119 #define MAX77826_LDO(_id, _type) \ argument
120 [MAX77826_LDO ## _id] = { \
121 .id = MAX77826_LDO ## _id, \
122 .name = "LDO"#_id, \
123 .of_match = of_match_ptr("LDO"#_id), \
129 .enable_reg = MAX77826_REG_LDO_OPMD1 + (_id - 1) / 4, \
130 .enable_mask = BIT(((_id - 1) % 4) * 2 + 1), \
131 .vsel_reg = MAX77826_REG_LDO1_CFG + (_id - 1), \
136 #define MAX77826_BUCK(_idx, _id, _ops) \ argument
137 [MAX77826_ ## _id] = { \
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Drtq2134-regulator.c26 #define RTQ2134_REG_FLT_RECORDBUCK(_id) (0x14 + (_id)) argument
27 #define RTQ2134_REG_FLT_BUCKCTRL(_id) (0x37 + (_id)) argument
270 #define RTQ2134_BUCK_DESC(_id) { \ argument
272 .name = "rtq2134_buck" #_id, \
273 .of_match = of_match_ptr("buck" #_id), \
275 .id = RTQ2134_IDX_BUCK##_id, \
282 .vsel_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG1, \
284 .enable_reg = RTQ2134_REG_BUCK##_id##_DVS0CFG0, \
286 .active_discharge_reg = RTQ2134_REG_BUCK##_id##_CFG0, \
288 .ramp_reg = RTQ2134_REG_BUCK##_id##_RSPCFG, \
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Dmp5416.c52 #define MP5416BUCK(_name, _id, _ilim, _dreg, _dval, _vsel) \ argument
53 [MP5416_BUCK ## _id] = { \
54 .id = MP5416_BUCK ## _id, \
65 .csel_mask = MP5416_MASK_BUCK ## _id ##_ILIM, \
66 .vsel_reg = MP5416_REG_BUCK ## _id, \
68 .enable_reg = MP5416_REG_BUCK ## _id, \
80 #define MP5416LDO(_name, _id, _dval) \ argument
81 [MP5416_LDO ## _id] = { \
82 .id = MP5416_LDO ## _id, \
90 .vsel_reg = MP5416_REG_LDO ##_id, \
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Dmpq7920.c27 #define MPQ7920BUCK(_name, _id, _ilim) \ argument
28 [MPQ7920_BUCK ## _id] = { \
29 .id = MPQ7920_BUCK ## _id, \
40 .csel_reg = MPQ7920_BUCK ##_id## _REG_C, \
44 MPQ7920_BUCK ## _id), \
45 .vsel_reg = MPQ7920_BUCK ##_id## _REG_A, \
48 .active_discharge_reg = MPQ7920_BUCK ##_id## _REG_B, \
50 .soft_start_reg = MPQ7920_BUCK ##_id## _REG_C, \
55 #define MPQ7920LDO(_name, _id, _ops, _ilim, _ilim_sz, _creg, _cmask) \ argument
56 [MPQ7920_LDO ## _id] = { \
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Dhi6421-regulator.c129 #define HI6421_LDO(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
131 [HI6421_##_id] = { \
133 .name = #_id, \
138 .id = HI6421_##_id, \
168 #define HI6421_LDO_LINEAR(_id, _match, _min_uV, n_volt, vstep, vreg, vmask,\ argument
170 [HI6421_##_id] = { \
172 .name = #_id, \
177 .id = HI6421_##_id, \
208 #define HI6421_LDO_LINEAR_RANGE(_id, _match, n_volt, volt_ranges, vreg, vmask,\ argument
210 [HI6421_##_id] = { \
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Dmax8925-regulator.c155 #define MAX8925_SDV(_id, min, max, step) \ argument
158 .name = "SDV" #_id, \
159 .of_match = of_match_ptr("SDV" #_id), \
163 .id = MAX8925_ID_SD##_id, \
169 .vol_reg = MAX8925_SDV##_id, \
170 .enable_reg = MAX8925_SDCTL##_id, \
173 #define MAX8925_LDO(_id, min, max, step) \ argument
176 .name = "LDO" #_id, \
177 .of_match = of_match_ptr("LDO" #_id), \
181 .id = MAX8925_ID_LDO##_id, \
[all …]
/Linux-v5.15/sound/soc/mediatek/mt8195/
Dmt8195-audsys-clk.c28 #define GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, _flags, _cgflags) {\ argument
29 .id = _id, \
38 #define GATE_AFE(_id, _name, _parent, _reg, _bit) \ argument
39 GATE_AFE_FLAGS(_id, _name, _parent, _reg, _bit, \
42 #define GATE_AUD0(_id, _name, _parent, _bit) \ argument
43 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON0, _bit)
45 #define GATE_AUD1(_id, _name, _parent, _bit) \ argument
46 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON1, _bit)
48 #define GATE_AUD3(_id, _name, _parent, _bit) \ argument
49 GATE_AFE(_id, _name, _parent, AUDIO_TOP_CON3, _bit)
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/Linux-v5.15/include/rdma/
Duverbs_std_types.h19 #define _uobj_check_id(_id) ((_id) * typecheck(u32, _id)) argument
24 #define uobj_get_read(_type, _id, _attrs) \ argument
26 _uobj_check_id(_id), UVERBS_LOOKUP_READ, \
40 #define uobj_get_obj_read(_object, _type, _id, _attrs) \ argument
42 uobj_get_read(_type, _id, _attrs)))
44 #define uobj_get_write(_type, _id, _attrs) \ argument
46 _uobj_check_id(_id), UVERBS_LOOKUP_WRITE, \
51 #define uobj_perform_destroy(_type, _id, _attrs) \ argument
53 _uobj_check_id(_id), _attrs)
58 #define uobj_get_destroy(_type, _id, _attrs) \ argument
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/Linux-v5.15/include/linux/mfd/
Dcore.h17 #define MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg, _use_of_reg, _match) \ argument
28 .id = (_id), \
31 #define MFD_CELL_OF_REG(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg) \ argument
32 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, _of_reg, true, NULL)
34 #define MFD_CELL_OF(_name, _res, _pdata, _pdsize, _id, _compat) \ argument
35 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, _compat, 0, false, NULL)
37 #define MFD_CELL_ACPI(_name, _res, _pdata, _pdsize, _id, _match) \ argument
38 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, NULL, 0, false, _match)
40 #define MFD_CELL_BASIC(_name, _res, _pdata, _pdsize, _id) \ argument
41 MFD_CELL_ALL(_name, _res, _pdata, _pdsize, _id, NULL, 0, false, NULL)
/Linux-v5.15/drivers/staging/media/atomisp/include/media/
Dlm3554.h27 #define v4l2_queryctrl_entry_integer(_id, _name,\ argument
31 .id = (_id), \
40 #define v4l2_queryctrl_entry_boolean(_id, _name,\ argument
43 .id = (_id), \
53 #define s_ctrl_id_entry_integer(_id, _name, \ argument
58 .qc = v4l2_queryctrl_entry_integer(_id, _name,\
65 #define s_ctrl_id_entry_boolean(_id, _name, \ argument
69 .qc = v4l2_queryctrl_entry_boolean(_id, _name,\
/Linux-v5.15/drivers/interconnect/imx/
Dimx.h41 #define DEFINE_BUS_INTERCONNECT(_name, _id, _adj, ...) \ argument
43 .id = _id, \
50 #define DEFINE_BUS_MASTER(_name, _id, _dest_id) \ argument
51 DEFINE_BUS_INTERCONNECT(_name, _id, NULL, _dest_id)
53 #define DEFINE_BUS_SLAVE(_name, _id, _adj) \ argument
54 DEFINE_BUS_INTERCONNECT(_name, _id, _adj)
/Linux-v5.15/drivers/clk/x86/
Dclk-cgu.h122 #define LGM_PLL(_id, _name, _pdata, _flags, \ argument
125 .id = _id, \
151 #define LGM_DDIV(_id, _name, _pname, _flags, _reg, \ argument
155 .id = _id, \
206 #define LGM_MUX(_id, _name, _pdata, _f, _reg, \ argument
209 .id = _id, \
222 #define LGM_DIV(_id, _name, _pname, _f, _reg, _shift, _width, \ argument
225 .id = _id, \
244 #define LGM_GATE(_id, _name, _pname, _f, _reg, \ argument
247 .id = _id, \
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