Searched refs:SMU_DCEFCLK (Results 1 – 7 of 7) sorted by relevance
250 SMU_DCEFCLK, enumerator
213 case SMU_DCEFCLK: in renoir_get_dpm_clk_limited()558 case SMU_DCEFCLK: in renoir_print_clk_levels()583 case SMU_DCEFCLK: in renoir_print_clk_levels()
1079 SMU_DCEFCLK, in navi10_set_default_dpm_table()1293 case SMU_DCEFCLK: in navi10_print_clk_levels()1485 case SMU_DCEFCLK: in navi10_force_clk_levels()1596 case SMU_DCEFCLK: in navi10_get_clock_by_type_with_latency()
907 SMU_DCEFCLK); in smu_v11_0_init_max_sustainable_clocks()1098 clk_select = SMU_DCEFCLK; in smu_v11_0_display_clock_voltage_request()
831 SMU_DCEFCLK, in sienna_cichlid_set_default_dpm_table()1074 case SMU_DCEFCLK: in sienna_cichlid_print_clk_levels()1255 case SMU_DCEFCLK: in sienna_cichlid_force_clk_levels()
878 SMU_DCEFCLK); in smu_v13_0_init_max_sustainable_clocks()1015 clk_select = SMU_DCEFCLK; in smu_v13_0_display_clock_voltage_request()
1946 clk_type = SMU_DCEFCLK; break; in smu_force_ppclk_levels()2378 clk_type = SMU_DCEFCLK; break; in smu_print_ppclk_levels()2687 clk_type = SMU_DCEFCLK; in smu_get_clock_by_type_with_latency()
