Searched refs:RING_PP_DIR_DCLV (Results 1 – 3 of 3) sorted by relevance
154 ENGINE_WRITE_FW(engine, RING_PP_DIR_DCLV, PP_DIR_DCLV_2G); in set_pp_dir()652 *cs++ = i915_mmio_reg_offset(RING_PP_DIR_DCLV(engine->mmio_base)); in load_pd_dir()
1601 ENGINE_READ(engine, RING_PP_DIR_DCLV)); in intel_engine_print_registers()
438 #define RING_PP_DIR_DCLV(base) _MMIO((base) + 0x220) macro
