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/Linux-v5.15/Documentation/driver-api/phy/
Dphy.rst2 PHY subsystem
7 This document explains the Generic PHY Framework along with the APIs provided,
13 *PHY* is the abbreviation for physical layer. It is used to connect a device
14 to the physical medium e.g., the USB controller has a PHY to provide functions
17 controllers have PHY functionality embedded into it and others use an external
18 PHY. Other peripherals that use PHY include Wireless LAN, Ethernet,
21 The intention of creating this framework is to bring the PHY drivers spread
25 This framework will be of use only to devices that use external PHY (PHY
28 Registering/Unregistering the PHY provider
31 PHY provider refers to an entity that implements one or more PHY instances.
[all …]
/Linux-v5.15/drivers/phy/broadcom/
DKconfig6 tristate "BCM63xx USBH PHY driver"
10 Enable this to support the BCM63xx USBH PHY driver.
14 tristate "Broadcom Cygnus PCIe PHY driver"
19 Enable this to support the Broadcom Cygnus PCIe PHY.
23 tristate "Broadcom Stingray USB PHY driver"
28 Enable this to support the Broadcom Stingray USB PHY
34 tristate "Broadcom Kona USB2 PHY Driver"
38 Enable this to support the Broadcom Kona USB 2.0 PHY.
41 tristate "Broadcom Northstar USB 2.0 PHY Driver"
46 Enable this to support Broadcom USB 2.0 PHY connected to the USB
[all …]
/Linux-v5.15/drivers/net/phy/
DKconfig3 # PHY Layer Configuration
12 PHYlink models the link between the PHY and MAC, allowing fixed
17 tristate "PHY Device support and infrastructure"
22 Ethernet controllers are usually attached to PHY
24 managing PHY devices.
35 Adds support for a set of LED trigger events per-PHY. Link
38 supported by the PHY and also a one common "link" trigger as a
45 for any speed known to the PHY.
49 tristate "MDIO Bus/PHY emulation with fixed speed/link PHYs"
64 comment "MII PHY device drivers"
[all …]
/Linux-v5.15/drivers/phy/ti/
DKconfig6 tristate "TI DA8xx USB PHY Driver"
11 Enable this to support the USB PHY on DA8xx SoCs.
13 This driver controls both the USB 1.1 PHY and the USB 2.0 PHY.
16 tristate "TI dm816x USB PHY driver"
33 This option enables support for TI AM654 SerDes PHY used for
53 tristate "OMAP CONTROL PHY Driver"
56 Enable this to add support for the PHY part present in the control
57 module. This driver has API to power on the USB2 PHY and to write to
59 power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
60 additional register to power on USB3 PHY/SATA PHY/PCIE PHY
[all …]
/Linux-v5.15/drivers/phy/qualcomm/
DKconfig6 tristate "Atheros AR71XX/9XXX USB PHY driver"
12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
15 tristate "Qualcomm APQ8064 SATA SerDes/PHY driver"
22 tristate "Qualcomm IPQ4019 USB PHY driver"
26 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
29 tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
36 tristate "Qualcomm PCIe Gen2 PHY Driver"
40 Enable this to support the Qualcomm PCIe PHY, used with the Synopsys
44 tristate "Qualcomm QMP PHY Driver"
48 Enable this to support the QMP PHY transceiver that is used
[all …]
/Linux-v5.15/drivers/phy/rockchip/
DKconfig6 tristate "Rockchip Display Port PHY Driver"
10 Enable this to support the Rockchip Display Port PHY.
25 tristate "Rockchip EMMC PHY Driver"
29 Enable this to support the Rockchip EMMC PHY.
32 tristate "Rockchip INNO HDMI PHY Driver"
38 Enable this to support the Rockchip Innosilicon HDMI PHY.
49 Support for Rockchip USB2.0 PHY with Innosilicon IP block.
52 tristate "Rockchip Innosilicon MIPI CSI PHY driver"
57 Enable this to support the Rockchip MIPI CSI PHY with
61 tristate "Rockchip Innosilicon MIPI/LVDS/TTL PHY driver"
[all …]
/Linux-v5.15/drivers/phy/
DKconfig3 # PHY
6 menu "PHY Subsystem"
9 bool "PHY Core"
11 Generic PHY support.
13 This framework is designed to provide a generic interface for PHY
15 API by which phy drivers can create PHY using the phy framework and
16 phy users can obtain reference to the PHY. All the users of this
22 Generic MIPI D-PHY support.
24 Provides a number of helpers a core functions for MIPI D-PHY
28 tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver"
[all …]
/Linux-v5.15/drivers/phy/marvell/
DKconfig6 bool "Armada 375 USB cluster PHY support" if COMPILE_TEST
12 tristate "Marvell Berlin SATA PHY driver"
17 Enable this to support the SATA PHY on Marvell Berlin SoCs.
20 tristate "Marvell Berlin USB PHY Driver"
25 Enable this to support the USB PHY on Marvell Berlin SoCs.
46 Enable this to support Marvell A3700 UTMI PHY driver.
76 Enable this to support Marvell CP110 UTMI PHY driver.
85 tristate "Marvell USB HSIC 28nm PHY Driver"
89 Enable this to support Marvell USB HSIC PHY driver for Marvell
90 SoC. This driver will do the PHY initialization and shutdown.
[all …]
/Linux-v5.15/drivers/phy/socionext/
DKconfig3 # PHY drivers for Socionext platforms.
7 tristate "UniPhier USB2 PHY driver"
13 Enable this to support USB PHY implemented on USB2 controller
15 with USB 2.0 PHY that is part of the UniPhier SoC.
16 In case of Pro4, it is necessary to specify this USB2 PHY instead
17 of USB3 HS-PHY.
20 tristate "UniPhier USB3 PHY driver"
25 Enable this to support USB PHY implemented in USB3 controller
29 tristate "Uniphier PHY driver for PCIe controller"
35 Enable this to support PHY implemented in PCIe controller
[all …]
/Linux-v5.15/drivers/phy/samsung/
DKconfig6 tristate "Exynos SoC series Display Port PHY driver"
12 Support for Display Port PHY found on Samsung Exynos SoCs.
15 tristate "S5P/Exynos SoC series MIPI CSI-2/DSI PHY driver"
25 bool "Exynos PCIe PHY driver"
29 Enable PCIe PHY support for Exynos SoC series.
30 This driver provides PHY interface for Exynos PCIe controller.
33 tristate "SAMSUNG SoC series UFS PHY driver"
37 Enable this to support the Samsung UFS PHY driver for
39 host controller to do PHY related programming.
42 tristate "Samsung USB 2.0 PHY driver"
[all …]
/Linux-v5.15/drivers/phy/cadence/
DKconfig7 tristate "Cadence Torrent PHY driver"
13 Support for Cadence Torrent PHY.
16 tristate "Cadence D-PHY Support"
21 Choose this option if you have a Cadence D-PHY in your
26 tristate "Cadence Sierra PHY Driver"
31 Enable this to support the Cadence Sierra PHY driver
34 tristate "Cadence Salvo PHY Driver"
38 Enable this to support the Cadence SALVO PHY driver,
39 this PHY is a legacy PHY, and only are used for USB3
/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dphy-hisi-inno-usb2.txt1 Device tree bindings for HiSilicon INNO USB2 PHY
7 - reg: Should be the address space for PHY configuration register in peripheral
9 - clocks: The phandle and clock specifier pair for INNO USB2 PHY device
11 - resets: The phandle and reset specifier pair for INNO USB2 PHY device reset
16 The INNO USB2 PHY device should be a child node of peripheral controller that
17 contains the PHY configuration register, and each device suppports up to 2 PHY
18 ports which are represented as child nodes of INNO USB2 PHY device.
20 Required properties for PHY port node:
21 - reg: The PHY port instance number.
22 - #phy-cells: Defined by generic PHY bindings. Must be 0.
[all …]
Dphy-bindings.txt2 information about PHY subsystem refer to Documentation/driver-api/phy/phy.rst
4 PHY device node
8 #phy-cells: Number of cells in a PHY specifier; The meaning of all those
9 cells is defined by the binding for the phy node. The PHY
11 PHY.
14 phy-supply: Phandle to a regulator that provides power to the PHY. This
15 regulator will be managed during the PHY power on/off sequence.
29 That node describes an IP block (PHY provider) that implements 2 different PHYs.
33 PHY user node
37 phys : the phandle for the PHY device (used by the PHY subsystem; not to be
[all …]
Dsamsung-phy.txt14 In case of exynos5433 compatible PHY:
21 the PHY specifier identifies the PHY and its meaning is as follows:
27 supports additional fifth PHY:
30 Samsung Exynos SoC series Display Port PHY
39 - #phy-cells : from the generic PHY bindings, must be 0;
41 Samsung S5P/Exynos SoC series USB PHY
60 PHY module
65 The first phandle argument in the PHY specifier identifies the PHY, its
91 Then the PHY can be used in other nodes such as:
98 Refer to DT bindings documentation of particular PHY consumer devices for more
[all …]
Dbrcm,stingray-usb-phy.txt1 Broadcom Stingray USB PHY
5 - "brcm,sr-usb-combo-phy" is combo PHY has two PHYs, one SS and one HS.
6 - "brcm,sr-usb-hs-phy" is a single HS PHY.
7 - reg: offset and length of the PHY blocks registers
10 the PHY number of two PHYs. 0 for HS PHY and 1 for SS PHY.
13 Refer to phy/phy-bindings.txt for the generic PHY binding properties
/Linux-v5.15/Documentation/networking/
Dphy.rst2 PHY Abstraction Layer
10 PHY. The PHY concerns itself with negotiating link parameters with the link
17 the PHY management code with the network driver. This has resulted in large
23 accessed are, in fact, busses, the PHY Abstraction Layer treats them as such.
30 Basically, this layer is meant to provide an interface to PHY devices which
37 Most network devices are connected to a PHY by means of a management bus.
47 mii_id is the address on the bus for the PHY, and regnum is the register
75 between the clock line (RXC or TXC) and the data lines to let the PHY (clock
77 PHY library offers different types of PHY_INTERFACE_MODE_RGMII* values to let
78 the PHY driver and optionally the MAC driver, implement the required delay. The
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/Linux-v5.15/net/mac80211/
Ddebugfs_sta.c756 PFLAG(PHY, 0, CHANNEL_WIDTH_SET_40MHZ_IN_2G, in sta_he_capa_read()
758 PFLAG(PHY, 0, CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G, in sta_he_capa_read()
760 PFLAG(PHY, 0, CHANNEL_WIDTH_SET_160MHZ_IN_5G, in sta_he_capa_read()
762 PFLAG(PHY, 0, CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G, in sta_he_capa_read()
764 PFLAG(PHY, 0, CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G, in sta_he_capa_read()
766 PFLAG(PHY, 0, CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G, in sta_he_capa_read()
784 PFLAG(PHY, 1, DEVICE_CLASS_A, in sta_he_capa_read()
786 PFLAG(PHY, 1, LDPC_CODING_IN_PAYLOAD, in sta_he_capa_read()
788 PFLAG(PHY, 1, HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US, in sta_he_capa_read()
792 PFLAG(PHY, 2, NDP_4x_LTF_AND_3_2US, "NDP-4X-LTF-AND-3-2US"); in sta_he_capa_read()
[all …]
/Linux-v5.15/drivers/phy/mediatek/
DKconfig6 tristate "MediaTek T-PHY Driver"
12 Say 'Y' here to add support for MediaTek T-PHY driver,
14 SATA, and meanwhile supports two version T-PHY which have
15 different banks layout, the T-PHY with shared banks between
20 tristate "MediaTek UFS M-PHY driver"
25 Support for UFS M-PHY on MediaTek chipsets.
31 tristate "MediaTek XS-PHY Driver"
37 Enable this to support the SuperSpeedPlus XS-PHY transceiver for
42 tristate "MediaTek HDMI-PHY Driver"
48 Support HDMI PHY for Mediatek SoCs.
/Linux-v5.15/drivers/phy/hisilicon/
DKconfig6 tristate "hi6220 USB PHY support"
12 Enable this to support the HISILICON HI6220 USB PHY.
17 tristate "hi3660 USB PHY support"
22 Enable this to support the HISILICON HI3660 USB PHY.
27 tristate "hi3670 USB PHY support"
32 Enable this to support the HISILICON HI3670 USB PHY.
46 tristate "HiSilicon INNO USB2 PHY support"
51 Support for INNO USB2 PHY on HiSilicon SoCs. This Phy supports
56 tristate "HIX5HD2 SATA PHY Driver"
61 Support for SATA PHY on Hisilicon hix5hd2 Soc.
/Linux-v5.15/drivers/phy/renesas/
DKconfig6 tristate "Renesas R-Car generation 2 USB PHY driver"
10 Support for USB PHY found on Renesas R-Car generation 2 SoCs.
13 tristate "Renesas R-Car generation 3 PCIe PHY driver"
17 Support for the PCIe PHY found on Renesas R-Car generation 3 SoCs.
20 tristate "Renesas R-Car generation 3 USB 2.0 PHY driver"
27 Support for USB 2.0 PHY found on Renesas R-Car generation 3 SoCs.
30 tristate "Renesas R-Car generation 3 USB 3.0 PHY driver"
34 Support for USB 3.0 PHY found on Renesas R-Car generation 3 SoCs.
/Linux-v5.15/Documentation/ABI/testing/
Dsysfs-class-net-phydev6 Symbolic link to the network device this PHY device is
14 This attribute contains the boolean value whether a given PHY
17 PHY configurations.
24 This attribute contains the 32-bit PHY Identifier as reported
34 This attribute contains the PHY interface as configured by the
37 appropriate mode for its data lines to the PHY hardware.
51 Boolean value indicating whether the PHY device is used in
61 configuration bits passed from the consumer of the PHY
62 (Ethernet MAC, switch, etc.) to the PHY driver. The flags are
65 for facilitating the debugging of PHY drivers.
/Linux-v5.15/drivers/phy/amlogic/
DKconfig6 tristate "Meson8, Meson8b, Meson8m2 and GXBB USB2 PHY driver"
19 tristate "Meson GXL and GXM USB2 PHY drivers"
31 tristate "Meson G12A USB2 PHY driver"
42 tristate "Meson G12A USB3+PCIE Combo PHY driver"
48 Enable this to support the Meson USB3 + PCIE Combo PHY found
53 tristate "Meson AXG PCIE PHY driver"
59 Enable this to support the Meson MIPI + PCIE PHY found
64 tristate "Meson AXG MIPI + PCIE analog PHY driver"
71 Enable this to support the Meson MIPI + PCIE analog PHY
/Linux-v5.15/drivers/gpu/drm/msm/
DKconfig83 bool "Enable DSI 28nm PHY driver in MSM DRM"
87 Choose this option if the 28nm DSI PHY is used on the platform.
90 bool "Enable DSI 20nm PHY driver in MSM DRM"
94 Choose this option if the 20nm DSI PHY is used on the platform.
97 bool "Enable DSI 28nm 8960 PHY driver in MSM DRM"
101 Choose this option if the 28nm DSI PHY 8960 variant is used on the
105 bool "Enable DSI 14nm PHY driver in MSM DRM (used by MSM8996/APQ8096)"
109 Choose this option if DSI PHY on 8996 is used on the platform.
112 bool "Enable DSI 10nm PHY driver in MSM DRM (used by SDM845)"
116 Choose this option if DSI PHY on SDM845 is used on the platform.
[all …]
/Linux-v5.15/drivers/phy/ralink/
DKconfig3 # PHY drivers for Ralink platforms.
6 tristate "MediaTek MT7621 PCI PHY Driver"
11 Say 'Y' here to add support for MediaTek MT7621 PCI PHY driver,
14 tristate "Ralink USB PHY driver"
20 This option enables support for the Ralink USB PHY found inside
/Linux-v5.15/Documentation/networking/device_drivers/ethernet/davicom/
Ddm9000.rst94 device, whether or not an external PHY is attached to the device and
113 The chip is connected to an external PHY.
122 Switch to using the simpler PHY polling method which does not
123 try and read the MII PHY state regularly. This is only available
124 when using the internal PHY. See the section on link state polling
128 "Force simple NSR based PHY polling" allows this flag to be
132 PHY Link state polling
137 depending on the version of the chip and on which PHY is being used.
139 For the internal PHY, the original (and currently default) method is
144 To reduce the overhead for the internal PHY, there is now the option
[all …]

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