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Searched refs:MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h24200 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_2_1_0_sh_mask.h20281 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_0_1_sh_mask.h40151 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_1_2_sh_mask.h22607 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_0_2_sh_mask.h47153 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_2_0_0_sh_mask.h23349 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_0_0_sh_mask.h54303 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro