Searched refs:Instruction (Results 1 – 25 of 55) sorted by relevance
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400 Instruction 106378866 0x8026B53C E52DE004 false PUSH {lr}401 Instruction 0 0x8026B540 E24DD00C false SUB sp,sp,#0xc402 Instruction 0 0x8026B544 E3A03000 false MOV r3,#0403 Instruction 0 0x8026B548 E58D3004 false STR r3,[sp,#4]404 Instruction 0 0x8026B54C E59D3004 false LDR r3,[sp,#4]405 Instruction 0 0x8026B550 E3530004 false CMP r3,#4406 Instruction 0 0x8026B554 E2833001 false ADD r3,r3,#1407 Instruction 0 0x8026B558 E58D3004 false STR r3,[sp,#4]408 Instruction 0 0x8026B55C DAFFFFFA true BLE {pc}-0x10 ; 0x8026b54c410 Instruction 319 0x8026B54C E59D3004 false LDR r3,[sp,#4][all …]
63 Instruction emulation71 Instruction Data Area (SIDA), the Interception Parameters (IP) and the74 Instruction data is copied to and from the SIDA when needed. Guest88 The Secure Instruction Data Area contains instruction storage89 data. Instruction data, i.e. data being referenced by an instruction97 Instruction emulation interceptions
20 Power5 - PowerPC User Instruction Set Architecture Book I v2.0223 PPC970 - PowerPC User Instruction Set Architecture Book I v2.01
59 | Instruction exception handler. For a normal exit, the62 | Unimplemented Integer Instruction stack frame with85 | Instruction exception handler. If the instruction was a "chk2"120 | Instruction exception handler isp_unimp(). If the instruction is a 64-bit123 | Integer Instruction stack frame and branches to this routine.
35 Integer Instruction" exception vector #61.108 For example, if the 68060 hardware took a "Unimplemented Integer Instruction"175 address) take the Unimplemented Integer Instruction exception. When the
37 exception vector #61 "Unimplemented Integer Instruction".
40 VECTOR EV_Extension ; Extn Instruction Exception121 ; Instruction fetch or Data access, under a single Exception Vector
105 VECTOR EV_TLBMissI ; 0x108, Instruction TLB miss (0x21)111 VECTOR EV_Extension ; 0x130, Extn Instruction Excp (0x26)
76 ; Instruction Error Exception Handler
80 def Instruction(self): member in LibXED
176 inst = glb_disassembler.Instruction()
42 Note: Instruction emulation may not be possible in all cases. See
115 1) ID_AA64ISAR0_EL1 - Instruction Set Attribute Register 0206 5) ID_AA64ISAR1_EL1 - Instruction set attribute register 1
71 Select (17)------------------------------(16) Data / Instruction
23 #error Instruction buffer size too small
52 Decode Instruction Tracing data, replacing it with synthesized events.
197 The flags field is synthesized and may have a value when Instruction210 Instruction Trace decoding. For calls and returns, it will display the218 Instruction Trace decoding.221 Instruction Trace decoding.
49 ## ISCSI CRC 32 Implementation with crc32 and pclmulqdq Instruction
327 Processor with Instruction Set for Audio Effects (Jan. 14, 1999)330 Audio Effects Processor having Decoupled Instruction347 Processor with Instruction Set for Audio Effects (Jul. 27, 1999)
332 Processor with Instruction Set for Audio Effects (Jan. 14, 1999)335 Audio Effects Processor having Decoupled Instruction352 Processor with Instruction Set for Audio Effects (Jul. 27, 1999)
24 CR19 Interrupt Instruction Register
370 iTLB|i-tlb|Instruction-TLB |
48 For Programmers, Volume II-A: The MIPS64(R) Instruction,
226 prompt "Power Manager Instruction (wait/doze/stop)"
191 7, 0, ECX, 2, umip, User-mode Instruction Prevention222 0xA, 0, EBX, 1, pmu_no_instr_ret_evt, Instruction retired event not available