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Searched refs:ttbr1 (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.10/arch/arm/mm/
Dproc-v7-3level.S117 .macro v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp
119 cmp \ttbr1, \tmp, lsr #12 @ PHYS_OFFSET > PAGE_OFFSET?
132 mov \tmp, \ttbr1, lsr #20
133 mov \ttbr1, \ttbr1, lsl #12
134 addls \ttbr1, \ttbr1, #TTBR1_OFFSET
135 mcrr p15, 1, \ttbr1, \tmp, c2 @ load TTBR1
Dproc-v7-2level.S144 .macro v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp
148 ALT_SMP(orr \ttbr1, \ttbr1, #TTB_FLAGS_SMP)
149 ALT_UP(orr \ttbr1, \ttbr1, #TTB_FLAGS_UP)
150 mcr p15, 0, \ttbr1, c2, c0, 1 @ load TTB1
/Linux-v5.10/arch/arm64/include/asm/
Duaccess.h127 unsigned long flags, ttbr0, ttbr1; in __uaccess_ttbr0_enable() local
138 ttbr1 = read_sysreg(ttbr1_el1); in __uaccess_ttbr0_enable()
139 ttbr1 &= ~TTBR_ASID_MASK; /* safety measure */ in __uaccess_ttbr0_enable()
140 ttbr1 |= ttbr0 & TTBR_ASID_MASK; in __uaccess_ttbr0_enable()
141 write_sysreg(ttbr1, ttbr1_el1); in __uaccess_ttbr0_enable()
Dmmu_context.h147 phys_addr_t ttbr1 = phys_to_ttbr(virt_to_phys(pgdp)); in cpu_replace_ttbr1() local
158 ttbr1 |= TTBR_CNP_BIT; in cpu_replace_ttbr1()
164 replace_phys(ttbr1); in cpu_replace_ttbr1()
/Linux-v5.10/arch/arm64/mm/
Dcontext.c351 unsigned long ttbr1 = read_sysreg(ttbr1_el1); in cpu_do_switch_mm() local
364 ttbr1 &= ~TTBR_ASID_MASK; in cpu_do_switch_mm()
365 ttbr1 |= FIELD_PREP(TTBR_ASID_MASK, asid); in cpu_do_switch_mm()
367 write_sysreg(ttbr1, ttbr1_el1); in cpu_do_switch_mm()