Searched refs:table_info (Results 1 – 14 of 14) sorted by relevance
194 struct phm_ppt_v2_information *table_info = in vega10_set_features_platform_caps() local283 if (table_info->tdp_table->usClockStretchAmount && in vega10_set_features_platform_caps()304 struct phm_ppt_v2_information *table_info = in vega10_odn_initial_default_setting() local322 vddc_lookup_table = table_info->vddc_lookup_table; in vega10_odn_initial_default_setting()329 dep_table[0] = table_info->vdd_dep_on_sclk; in vega10_odn_initial_default_setting()330 dep_table[1] = table_info->vdd_dep_on_mclk; in vega10_odn_initial_default_setting()331 dep_table[2] = table_info->vdd_dep_on_socclk; in vega10_odn_initial_default_setting()520 struct phm_ppt_v2_information *table_info = in vega10_get_socclk_for_voltage_evv() local528 for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { in vega10_get_socclk_for_voltage_evv()529 voltage_id = table_info->vdd_dep_on_socclk->entries[entry_id].vddInd; in vega10_get_socclk_for_voltage_evv()[all …]
254 struct phm_ppt_v1_information *table_info = in smu7_construct_voltage_tables() local269 table_info->vdd_dep_on_mclk); in smu7_construct_voltage_tables()289 table_info->vdd_dep_on_mclk); in smu7_construct_voltage_tables()301 table_info->vddgfx_lookup_table); in smu7_construct_voltage_tables()320 table_info->vddc_lookup_table); in smu7_construct_voltage_tables()531 struct phm_ppt_v1_information *table_info = in smu7_setup_default_pcie_table() local542 if (table_info != NULL) in smu7_setup_default_pcie_table()543 pcie_table = table_info->pcie_table; in smu7_setup_default_pcie_table()758 struct phm_ppt_v1_information *table_info = in smu7_setup_dpm_tables_v1() local765 if (table_info == NULL) in smu7_setup_dpm_tables_v1()[all …]
466 struct phm_ppt_v1_information *table_info = in phm_get_sclk_for_voltage_evv() local472 for (entry_id = 0; entry_id < table_info->vdd_dep_on_sclk->count; entry_id++) { in phm_get_sclk_for_voltage_evv()473 voltage_id = table_info->vdd_dep_on_sclk->entries[entry_id].vddInd; in phm_get_sclk_for_voltage_evv()478 if (entry_id >= table_info->vdd_dep_on_sclk->count) { in phm_get_sclk_for_voltage_evv()483 *sclk = table_info->vdd_dep_on_sclk->entries[entry_id].clk; in phm_get_sclk_for_voltage_evv()536 struct phm_ppt_v1_information *table_info = in phm_apply_dal_min_voltage_request() local539 table_info->vddc_dep_on_dal_pwrl; in phm_apply_dal_min_voltage_request()556 vddc_table = table_info->vdd_dep_on_sclk; in phm_apply_dal_min_voltage_request()
1266 struct phm_ppt_v2_information *table_info = in vega10_initialize_power_tune_defaults() local1268 struct phm_tdp_table *tdp_table = table_info->tdp_table; in vega10_initialize_power_tune_defaults()1317 struct phm_ppt_v2_information *table_info = in vega10_enable_power_containment() local1319 struct phm_tdp_table *tdp_table = table_info->tdp_table; in vega10_enable_power_containment()
1123 struct phm_ppt_v1_information *table_info = in smu7_enable_power_containment() local1131 cac_table = table_info->cac_dtp_table; in smu7_enable_power_containment()1213 struct phm_ppt_v1_information *table_info = in smu7_power_control_set_level() local1221 cac_table = table_info->cac_dtp_table; in smu7_power_control_set_level()
812 struct phm_ppt_v2_information *table_info = in get_pcie_table() local830 pcie_count = table_info->vdd_dep_on_sclk->count; in get_pcie_table()
1709 struct phm_ppt_v2_information *table_info = in vega12_get_dal_power_level()1712 &table_info->max_clock_voltage_on_ac; in vega12_get_dal_power_level()
2755 struct phm_ppt_v2_information *table_info = in vega20_get_dal_power_level()2758 &table_info->max_clock_voltage_on_ac; in vega20_get_dal_power_level()
335 struct phm_ppt_v1_information *table_info = in vegam_update_uvd_smc_table() local339 if (table_info->mm_dep_table->count > 0) in vegam_update_uvd_smc_table()341 (uint8_t) (table_info->mm_dep_table->count - 1); in vegam_update_uvd_smc_table()368 struct phm_ppt_v1_information *table_info = in vegam_update_vce_smc_table() local374 (uint8_t) (table_info->mm_dep_table->count - 1); in vegam_update_vce_smc_table()400 struct phm_ppt_v1_information *table_info = in vegam_update_bif_smc_table() local402 struct phm_ppt_v1_pcie_table *pcie_table = table_info->pcie_table; in vegam_update_bif_smc_table()435 struct phm_ppt_v1_information *table_info = in vegam_initialize_power_tune_defaults() local438 if (table_info && in vegam_initialize_power_tune_defaults()439 table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX && in vegam_initialize_power_tune_defaults()[all …]
471 struct phm_ppt_v1_information *table_info = in fiji_initialize_power_tune_defaults() local474 if (table_info && in fiji_initialize_power_tune_defaults()475 table_info->cac_dtp_table->usPowerTuneDataSetID <= POWERTUNE_DEFAULT_SET_MAX && in fiji_initialize_power_tune_defaults()476 table_info->cac_dtp_table->usPowerTuneDataSetID) in fiji_initialize_power_tune_defaults()479 [table_info->cac_dtp_table->usPowerTuneDataSetID - 1]; in fiji_initialize_power_tune_defaults()493 struct phm_ppt_v1_information *table_info = in fiji_populate_bapm_parameters_in_dpm_table() local495 struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table; in fiji_populate_bapm_parameters_in_dpm_table()587 struct phm_ppt_v1_information *table_info = in fiji_populate_tdc_limit() local594 tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128); in fiji_populate_tdc_limit()673 struct phm_ppt_v1_information *table_info = in fiji_populate_bapm_vddc_base_leakage_sidd() local[all …]
431 struct phm_ppt_v1_information *table_info = in polaris10_populate_bapm_parameters_in_dpm_table() local433 struct phm_cac_tdp_table *cac_dtp_table = table_info->cac_dtp_table; in polaris10_populate_bapm_parameters_in_dpm_table()490 struct phm_ppt_v1_information *table_info = in polaris10_populate_tdc_limit() local494 tdc_limit = (uint16_t)(table_info->cac_dtp_table->usTDC * 128); in polaris10_populate_tdc_limit()570 struct phm_ppt_v1_information *table_info = in polaris10_populate_bapm_vddc_base_leakage_sidd() local574 struct phm_cac_tdp_table *cac_table = table_info->cac_dtp_table; in polaris10_populate_bapm_vddc_base_leakage_sidd()705 struct phm_ppt_v1_information *table_info = in polaris10_populate_cac_table() local708 table_info->vddc_lookup_table; in polaris10_populate_cac_table()739 struct phm_ppt_v1_information *table_info = in polaris10_populate_ulv_level() local745 state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset; in polaris10_populate_ulv_level()[all …]
482 struct phm_ppt_v1_information *table_info = in tonga_populate_ulv_level() local488 state->VddcOffset = (uint16_t) table_info->us_ulv_voltage_offset; in tonga_populate_ulv_level()489 state->VddcOffsetVid = (uint8_t)(table_info->us_ulv_voltage_offset * in tonga_populate_ulv_level()1147 struct phm_ppt_v1_information *table_info = in tonga_populate_mvdd_value() local1153 for (i = 0; i < table_info->vdd_dep_on_mclk->count; i++) { in tonga_populate_mvdd_value()1154 if (mclk <= table_info->vdd_dep_on_mclk->entries[i].clk) { in tonga_populate_mvdd_value()1162 PP_ASSERT_WITH_CODE(i < table_info->vdd_dep_on_mclk->count, in tonga_populate_mvdd_value()1582 struct phm_ppt_v1_information *table_info = in tonga_populate_clock_stretcher_data_table() local1585 table_info->vdd_dep_on_sclk; in tonga_populate_clock_stretcher_data_table()1589 stretch_amount = (uint8_t)table_info->cac_dtp_table->usClockStretchAmount; in tonga_populate_clock_stretcher_data_table()[all …]
44 typedef struct table_info struct50 } table_info; argument60 table_info table_list[TOTAL_TABLES];
162 struct table_info *info; in amdgpu_discovery_init()
